Constant avrd::attiny45::enum_sut_cksel::PLLCLK_16KCK_14CK_64MS[][src]

pub const PLLCLK_16KCK_14CK_64MS: u32 = 0x31;

PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms.