Constant avrd::attiny45::enum_sut_cksel::PLLCLK_16KCK_14CK_4MS[][src]

pub const PLLCLK_16KCK_14CK_4MS: u32 = 0x11;

PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms.