Constant avrd::attiny43u::enum_sut_cksel::PLLCLK_1KCK_14CK_68MS [−][src]
pub const PLLCLK_1KCK_14CK_68MS: u32 = 0x21;
PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms.
pub const PLLCLK_1KCK_14CK_68MS: u32 = 0x21;
PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms.