Constant avrd::attiny261::enum_sut_cksel::PLLCLK_1KCK_14CK_8MS [−][src]
pub const PLLCLK_1KCK_14CK_8MS: u32 = 0x1;
PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms.
pub const PLLCLK_1KCK_14CK_8MS: u32 = 0x1;
PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms.