Constant avrd::attiny261::enum_sut_cksel::PLLCLK_16KCK_14CK_68MS[][src]

pub const PLLCLK_16KCK_14CK_68MS: u32 = 0x31;

PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms.