Constant avrd::at90pwm3b::enum_sut_cksel::PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS

pub const PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS: u32 = 0x11;

PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms.