Module avrd::attiny1634
[−]
[src]
The AVR ATtiny1634 microcontroller
Variants
| Pinout | Package | Operating temperature | Operating voltage | Max speed | |
|---|---|---|---|---|---|
| standard | 0°C - 0°C | 1.8V - 5.5V | 0 MHz |
Registers by module (not exhaustive)
PORT modules
- PORTB
- PORTC
- PORTA
ADC modules
- ADC
EEPROM modules
- EEPROM
USART modules
- USART0
- USART1
Constants
| ACSRA |
Analog Comparator Control And Status Register A. |
| ACSRB |
Analog Comparator Control And Status Register B. |
| ADC |
ADC Data Register Bytes. |
| ADCH |
ADC Data Register Bytes high byte. |
| ADCL |
ADC Data Register Bytes low byte. |
| ADCSRA |
The ADC Control and Status register. |
| ADCSRB |
ADC Control and Status Register B. |
| ADMUX |
The ADC multiplexer Selection Register. |
| CCP |
Configuration Change Protection. |
| CLKPR |
Clock Prescale Register. |
| CLKSR |
Clock Setting Register. |
| DDRA |
Data Direction Register, Port A. |
| DDRB |
Data Direction Register, Port B. |
| DDRC |
Data Direction Register, Port C. |
| DIDR0 |
Digital Input Disable Register 0. |
| DIDR1 |
Digital Input Disable Register 1. |
| DIDR2 |
Digital Input Disable Register 2. |
| EEAR |
EEPROM Read/Write Access. |
| EEARH |
EEPROM Read/Write Access high byte. |
| EEARL |
EEPROM Read/Write Access low byte. |
| EECR |
EEPROM Control Register. |
| EEDR |
EEPROM Data Register. |
| EXTENDED | |
| GIFR |
General Interrupt Flag Register. |
| GIMSK |
General Interrupt Mask Register. |
| GPIOR0 |
General Purpose I/O Register 0. |
| GPIOR1 |
General Purpose I/O Register 1. |
| GPIOR2 |
General Purpose I/O Register 2. |
| GTCCR |
General Timer/Counter Control Register. |
| HIGH | |
| ICR1 |
Timer/Counter1 Input Capture Register Bytes. |
| ICR1H |
Timer/Counter1 Input Capture Register Bytes high byte. |
| ICR1L |
Timer/Counter1 Input Capture Register Bytes low byte. |
| LOCKBIT | |
| LOW | |
| MCUCR |
MCU Control Register. |
| MCUSR |
MCU Status Register. |
| OCR0A |
Timer/Counter0 Output Compare Register. |
| OCR0B |
Timer/Counter0 Output Compare Register. |
| OCR1A |
Timer/Counter1 Output Compare Register Bytes. |
| OCR1AH |
Timer/Counter1 Output Compare Register Bytes high byte. |
| OCR1AL |
Timer/Counter1 Output Compare Register Bytes low byte. |
| OCR1B |
Timer/Counter1 Output Compare Register Bytes. |
| OCR1BH |
Timer/Counter1 Output Compare Register Bytes high byte. |
| OCR1BL |
Timer/Counter1 Output Compare Register Bytes low byte. |
| OSCCAL0 |
Oscillator Calibration Value. |
| OSCCAL1 | |
| OSCTCAL0A | |
| OSCTCAL0B | |
| PCMSK0 |
Pin Change Mask Register 0. |
| PCMSK1 |
Pin Change Mask Register 1. |
| PCMSK2 |
Pin Change Mask Register 2. |
| PINA |
Port A Input Pins. |
| PINB |
Port B Data register. |
| PINC |
Port C Input Pins. |
| PORTA |
Port A Data Register. |
| PORTB |
Input Pins, Port B. |
| PORTC |
Port C Data Register. |
| PORTCR |
Port Control Register. |
| PRR |
Power Reduction Register. |
| PUEA |
Pull-up Enable Control Register. |
| PUEB |
Pull-up Enable Control Register. |
| PUEC |
Pull-up Enable Control Register. |
| SP |
Stack Pointer. |
| SPH |
Stack Pointer high byte. |
| SPL |
Stack Pointer low byte. |
| SPMCSR |
Store Program Memory Control and Status Register. |
| SREG |
Status Register. |
| TCCR0A |
Timer/Counter Control Register A. |
| TCCR0B |
Timer/Counter Control Register B. |
| TCCR1A |
Timer/Counter1 Control Register A. |
| TCCR1B |
Timer/Counter1 Control Register B. |
| TCCR1C |
Timer/Counter1 Control Register C. |
| TCNT0 |
Timer/Counter0. |
| TCNT1 |
Timer/Counter1 Bytes. |
| TCNT1H |
Timer/Counter1 Bytes high byte. |
| TCNT1L |
Timer/Counter1 Bytes low byte. |
| TIFR |
Timer/Counter Interrupt Flag register. |
| TIMSK |
Timer/Counter Interrupt Mask Register. |
| TWSA |
TWI Slave Address Register. |
| TWSAM |
TWI Slave Address Mask Register. |
| TWSCRA |
TWI Slave Control Register A. |
| TWSCRB |
TWI Slave Control Register B. |
| TWSD |
TWI Slave Data Register. |
| TWSSRA |
TWI Slave Status Register A. |
| UBRR0 |
USART Baud Rate Register Bytes. |
| UBRR1 |
USART Baud Rate Register Bytes. |
| UBRR0H |
USART Baud Rate Register Bytes high byte. |
| UBRR0L |
USART Baud Rate Register Bytes low byte. |
| UBRR1H |
USART Baud Rate Register Bytes high byte. |
| UBRR1L |
USART Baud Rate Register Bytes low byte. |
| UCSR0A |
USART Control and Status Register A. |
| UCSR0B |
USART Control and Status Register B. |
| UCSR0C |
USART Control and Status Register C. |
| UCSR0D |
USART Control and Status Register D. |
| UCSR1A |
USART Control and Status Register A. |
| UCSR1B |
USART Control and Status Register B. |
| UCSR1C |
USART Control and Status Register C. |
| UCSR1D |
USART Control and Status Register D. |
| UDR0 |
USART I/O Data Register. |
| UDR1 |
USART I/O Data Register. |
| USIBR |
USI Buffer Register. |
| USICR |
USI Control Register. |
| USIDR |
USI Data Register. |
| USISR |
USI Status Register. |
| WDTCSR |
Watchdog Timer Control and Status Register. |