Module avrd::atmega64rfr2
[−]
[src]
The AVR ATmega64RFR2 microcontroller
Variants
| Pinout | Package | Operating temperature | Operating voltage | Max speed | |
|---|---|---|---|---|---|
| standard | 0°C - 0°C | 1.8V - 3.6V | 0 MHz |
Registers by module (not exhaustive)
PORT modules
- PORTA
- PORTB
- PORTC
- PORTD
- PORTE
- PORTF
- PORTG
USART modules
- USART0
- USART1
EEPROM modules
- EEPROM
JTAG modules
- JTAG
ADC modules
- ADC
FLASH modules
- FLASH
Constants
| ACSR |
Analog Comparator Control And Status Register. |
| ADC |
ADC Data Register Bytes. |
| ADCH |
ADC Data Register Bytes high byte. |
| ADCL |
ADC Data Register Bytes low byte. |
| ADCSRA |
The ADC Control and Status Register A. |
| ADCSRB |
The ADC Control and Status Register B. |
| ADCSRC |
The ADC Control and Status Register C. |
| ADMUX |
The ADC Multiplexer Selection Register. |
| AES_CTRL |
AES Control Register. |
| AES_KEY |
AES Encryption and Decryption Key Buffer Register. |
| AES_STATE |
AES Plain and Cipher Text Buffer Register. |
| AES_STATUS |
AES Status Register. |
| ANT_DIV |
Antenna Diversity Control Register. |
| ASSR |
Asynchronous Status Register. |
| BATMON |
Battery Monitor Control and Status Register. |
| BGCR |
Reference Voltage Calibration Register. |
| CCA_THRES |
Transceiver CCA Threshold Setting Register. |
| CC_CTRL_0 |
Channel Control Register 0. |
| CC_CTRL_1 |
Channel Control Register 1. |
| CLKPR |
Clock Prescale Register. |
| CSMA_BE |
Transceiver CSMA-CA Back-off Exponent Control Register. |
| CSMA_SEED_0 |
Transceiver CSMA-CA Random Number Generator Seed Register. |
| CSMA_SEED_1 |
Transceiver Acknowledgment Frame Control Register 2. |
| DDRA |
Port A Data Direction Register. |
| DDRB |
Port B Data Direction Register. |
| DDRC |
Port C Data Direction Register. |
| DDRD |
Port D Data Direction Register. |
| DDRE |
Port E Data Direction Register. |
| DDRF |
Port F Data Direction Register. |
| DDRG |
Port G Data Direction Register. |
| DIDR0 |
Digital Input Disable Register 0. |
| DIDR1 |
Digital Input Disable Register 1. |
| DIDR2 |
Digital Input Disable Register 2. |
| DPDS0 |
Port Driver Strength Register 0. |
| DPDS1 |
Port Driver Strength Register 1. |
| DRTRAM0 |
Data Retention Configuration Register #0. |
| DRTRAM1 |
Data Retention Configuration Register #1. |
| DRTRAM2 |
Data Retention Configuration Register #2. |
| DRTRAM3 |
Data Retention Configuration Register #3. |
| EEAR |
EEPROM Address Register Bytes. |
| EEARH |
EEPROM Address Register Bytes high byte. |
| EEARL |
EEPROM Address Register Bytes low byte. |
| EECR |
EEPROM Control Register. |
| EEDR |
EEPROM Data Register. |
| EICRA |
External Interrupt Control Register A. |
| EICRB |
External Interrupt Control Register B. |
| EIFR |
External Interrupt Flag Register. |
| EIMSK |
External Interrupt Mask Register. |
| EXTENDED | |
| FTN_CTRL |
Transceiver Filter Tuning Control Register. |
| GPIOR0 |
General Purpose IO Register 0. |
| GPIOR1 |
General Purpose IO Register 1. |
| GPIOR2 |
General Purpose I/O Register 2. |
| GTCCR |
General Timer Counter Control register. |
| HIGH | |
| ICR1 |
Timer/Counter1 Input Capture Register Bytes. |
| ICR3 |
Timer/Counter3 Input Capture Register Bytes. |
| ICR4 |
Timer/Counter4 Input Capture Register Bytes. |
| ICR5 |
Timer/Counter5 Input Capture Register Bytes. |
| ICR1H |
Timer/Counter1 Input Capture Register Bytes high byte. |
| ICR1L |
Timer/Counter1 Input Capture Register Bytes low byte. |
| ICR3H |
Timer/Counter3 Input Capture Register Bytes high byte. |
| ICR3L |
Timer/Counter3 Input Capture Register Bytes low byte. |
| ICR4H |
Timer/Counter4 Input Capture Register Bytes high byte. |
| ICR4L |
Timer/Counter4 Input Capture Register Bytes low byte. |
| ICR5H |
Timer/Counter5 Input Capture Register Bytes high byte. |
| ICR5L |
Timer/Counter5 Input Capture Register Bytes low byte. |
| IEEE_ADDR_0 |
Transceiver MAC IEEE Address Register 0. |
| IEEE_ADDR_1 |
Transceiver MAC IEEE Address Register 1. |
| IEEE_ADDR_2 |
Transceiver MAC IEEE Address Register 2. |
| IEEE_ADDR_3 |
Transceiver MAC IEEE Address Register 3. |
| IEEE_ADDR_4 |
Transceiver MAC IEEE Address Register 4. |
| IEEE_ADDR_5 |
Transceiver MAC IEEE Address Register 5. |
| IEEE_ADDR_6 |
Transceiver MAC IEEE Address Register 6. |
| IEEE_ADDR_7 |
Transceiver MAC IEEE Address Register 7. |
| IRQ_MASK |
Transceiver Interrupt Enable Register. |
| IRQ_MASK1 |
Transceiver Interrupt Enable Register 1. |
| IRQ_STATUS |
Transceiver Interrupt Status Register. |
| IRQ_STATUS1 |
Transceiver Interrupt Status Register 1. |
| LLCR |
Low Leakage Voltage Regulator Control Register. |
| LLDRH |
Low Leakage Voltage Regulator Data Register (High-Byte). |
| LLDRL |
Low Leakage Voltage Regulator Data Register (Low-Byte). |
| LOCKBIT | |
| LOW | |
| MAFCR0 |
Multiple Address Filter Configuration Register 0. |
| MAFCR1 |
Multiple Address Filter Configuration Register 1. |
| MAFPA0H |
Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte). |
| MAFPA0L |
Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte). |
| MAFPA1H |
Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte). |
| MAFPA1L |
Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte). |
| MAFPA2H |
Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte). |
| MAFPA2L |
Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte). |
| MAFPA3H |
Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte). |
| MAFPA3L |
Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte). |
| MAFSA0H |
Transceiver MAC Short Address Register for Frame Filter 0 (High Byte). |
| MAFSA0L |
Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte). |
| MAFSA1H |
Transceiver MAC Short Address Register for Frame Filter 1 (High Byte). |
| MAFSA1L |
Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte). |
| MAFSA2H |
Transceiver MAC Short Address Register for Frame Filter 2 (High Byte). |
| MAFSA2L |
Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte). |
| MAFSA3H |
Transceiver MAC Short Address Register for Frame Filter 3 (High Byte). |
| MAFSA3L |
Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte). |
| MAN_ID_0 |
Device Identification Register (Manufacture ID Low Byte). |
| MAN_ID_1 |
Device Identification Register (Manufacture ID High Byte). |
| MCUCR |
MCU Control Register. |
| MCUSR |
MCU Status Register. |
| NEMCR |
Flash Extended-Mode Control-Register. |
| OCDR |
On-Chip Debug Register. |
| OCR0A |
Timer/Counter0 Output Compare Register. |
| OCR0B |
Timer/Counter0 Output Compare Register B. |
| OCR1A |
Timer/Counter1 Output Compare Register A Bytes. |
| OCR1AH |
Timer/Counter1 Output Compare Register A Bytes high byte. |
| OCR1AL |
Timer/Counter1 Output Compare Register A Bytes low byte. |
| OCR1B |
Timer/Counter1 Output Compare Register B Bytes. |
| OCR1BH |
Timer/Counter1 Output Compare Register B Bytes high byte. |
| OCR1BL |
Timer/Counter1 Output Compare Register B Bytes low byte. |
| OCR1C |
Timer/Counter1 Output Compare Register C Bytes. |
| OCR1CH |
Timer/Counter1 Output Compare Register C Bytes high byte. |
| OCR1CL |
Timer/Counter1 Output Compare Register C Bytes low byte. |
| OCR2A |
Timer/Counter2 Output Compare Register A. |
| OCR2B |
Timer/Counter2 Output Compare Register B. |
| OCR3A |
Timer/Counter3 Output Compare Register A Bytes. |
| OCR3AH |
Timer/Counter3 Output Compare Register A Bytes high byte. |
| OCR3AL |
Timer/Counter3 Output Compare Register A Bytes low byte. |
| OCR3B |
Timer/Counter3 Output Compare Register B Bytes. |
| OCR3BH |
Timer/Counter3 Output Compare Register B Bytes high byte. |
| OCR3BL |
Timer/Counter3 Output Compare Register B Bytes low byte. |
| OCR3C |
Timer/Counter3 Output Compare Register C Bytes. |
| OCR3CH |
Timer/Counter3 Output Compare Register C Bytes high byte. |
| OCR3CL |
Timer/Counter3 Output Compare Register C Bytes low byte. |
| OCR4A |
Timer/Counter4 Output Compare Register A Bytes. |
| OCR4AH |
Timer/Counter4 Output Compare Register A Bytes high byte. |
| OCR4AL |
Timer/Counter4 Output Compare Register A Bytes low byte. |
| OCR4B |
Timer/Counter4 Output Compare Register B Bytes. |
| OCR4BH |
Timer/Counter4 Output Compare Register B Bytes high byte. |
| OCR4BL |
Timer/Counter4 Output Compare Register B Bytes low byte. |
| OCR4C |
Timer/Counter4 Output Compare Register C Bytes. |
| OCR4CH |
Timer/Counter4 Output Compare Register C Bytes high byte. |
| OCR4CL |
Timer/Counter4 Output Compare Register C Bytes low byte. |
| OCR5A |
Timer/Counter5 Output Compare Register A Bytes. |
| OCR5AH |
Timer/Counter5 Output Compare Register A Bytes high byte. |
| OCR5AL |
Timer/Counter5 Output Compare Register A Bytes low byte. |
| OCR5B |
Timer/Counter5 Output Compare Register B Bytes. |
| OCR5BH |
Timer/Counter5 Output Compare Register B Bytes high byte. |
| OCR5BL |
Timer/Counter5 Output Compare Register B Bytes low byte. |
| OCR5C |
Timer/Counter5 Output Compare Register C Bytes. |
| OCR5CH |
Timer/Counter5 Output Compare Register C Bytes high byte. |
| OCR5CL |
Timer/Counter5 Output Compare Register C Bytes low byte. |
| OSCCAL |
Oscillator Calibration Value. |
| PAN_ID_0 |
Transceiver Personal Area Network ID Register (Low Byte). |
| PAN_ID_1 |
Transceiver Personal Area Network ID Register (High Byte). |
| PARCR |
Power Amplifier Ramp up/down Control Register. |
| PART_NUM |
Device Identification Register (Part Number). |
| PCICR |
Pin Change Interrupt Control Register. |
| PCIFR |
Pin Change Interrupt Flag Register. |
| PCMSK0 |
Pin Change Mask Register 0. |
| PCMSK1 |
Pin Change Mask Register 1. |
| PCMSK2 |
Pin Change Mask Register 2. |
| PHY_CC_CCA |
Transceiver Clear Channel Assessment (CCA) Control Register. |
| PHY_ED_LEVEL |
Transceiver Energy Detection Level Register. |
| PHY_RSSI |
Receiver Signal Strength Indicator Register. |
| PHY_TX_PWR |
Transceiver Transmit Power Control Register. |
| PINA |
Port A Input Pins Address. |
| PINB |
Port B Input Pins Address. |
| PINC |
Port C Input Pins Address. |
| PIND |
Port D Input Pins Address. |
| PINE |
Port E Input Pins Address. |
| PINF |
Port F Input Pins Address. |
| PING |
Port G Input Pins Address. |
| PLL_CF |
Transceiver Center Frequency Calibration Control Register. |
| PLL_DCU |
Transceiver Delay Cell Calibration Control Register. |
| PORTA |
Port A Data Register. |
| PORTB |
Port B Data Register. |
| PORTC |
Port C Data Register. |
| PORTD |
Port D Data Register. |
| PORTE |
Port E Data Register. |
| PORTF |
Port F Data Register. |
| PORTG |
Port G Data Register. |
| PRR0 |
Power Reduction Register0. |
| PRR1 |
Power Reduction Register 1. |
| PRR2 |
Power Reduction Register 2. |
| RX_CTRL |
Transceiver Receive Control Register. |
| RX_SYN |
Transceiver Receiver Sensitivity Control Register. |
| SCBTSRHH |
Symbol Counter Beacon Timestamp Register HH-Byte. |
| SCBTSRHL |
Symbol Counter Beacon Timestamp Register HL-Byte. |
| SCBTSRLH |
Symbol Counter Beacon Timestamp Register LH-Byte. |
| SCBTSRLL |
Symbol Counter Beacon Timestamp Register LL-Byte. |
| SCCNTHH |
Symbol Counter Register HH-Byte. |
| SCCNTHL |
Symbol Counter Register HL-Byte. |
| SCCNTLH |
Symbol Counter Register LH-Byte. |
| SCCNTLL |
Symbol Counter Register LL-Byte. |
| SCCR0 |
Symbol Counter Control Register 0. |
| SCCR1 |
Symbol Counter Control Register 1. |
| SCCSR |
Symbol Counter Compare Source Register. |
| SCIRQM |
Symbol Counter Interrupt Mask Register. |
| SCIRQS |
Symbol Counter Interrupt Status Register. |
| SCOCR1HH |
Symbol Counter Output Compare Register 1 HH-Byte. |
| SCOCR1HL |
Symbol Counter Output Compare Register 1 HL-Byte. |
| SCOCR1LH |
Symbol Counter Output Compare Register 1 LH-Byte. |
| SCOCR1LL |
Symbol Counter Output Compare Register 1 LL-Byte. |
| SCOCR2HH |
Symbol Counter Output Compare Register 2 HH-Byte. |
| SCOCR2HL |
Symbol Counter Output Compare Register 2 HL-Byte. |
| SCOCR2LH |
Symbol Counter Output Compare Register 2 LH-Byte. |
| SCOCR2LL |
Symbol Counter Output Compare Register 2 LL-Byte. |
| SCOCR3HH |
Symbol Counter Output Compare Register 3 HH-Byte. |
| SCOCR3HL |
Symbol Counter Output Compare Register 3 HL-Byte. |
| SCOCR3LH |
Symbol Counter Output Compare Register 3 LH-Byte. |
| SCOCR3LL |
Symbol Counter Output Compare Register 3 LL-Byte. |
| SCRSTRHH |
Symbol Counter Received Frame Timestamp Register HH-Byte. |
| SCRSTRHL |
Symbol Counter Received Frame Timestamp Register HL-Byte. |
| SCRSTRLH |
Symbol Counter Received Frame Timestamp Register LH-Byte. |
| SCRSTRLL |
Symbol Counter Received Frame Timestamp Register LL-Byte. |
| SCSR |
Symbol Counter Status Register. |
| SCTSRHH |
Symbol Counter Frame Timestamp Register HH-Byte. |
| SCTSRHL |
Symbol Counter Frame Timestamp Register HL-Byte. |
| SCTSRLH |
Symbol Counter Frame Timestamp Register LH-Byte. |
| SCTSRLL |
Symbol Counter Frame Timestamp Register LL-Byte. |
| SCTSTRHH |
Symbol Counter Transmit Frame Timestamp Register HH-Byte. |
| SCTSTRHL |
Symbol Counter Transmit Frame Timestamp Register HL-Byte. |
| SCTSTRLH |
Symbol Counter Transmit Frame Timestamp Register LH-Byte. |
| SCTSTRLL |
Symbol Counter Transmit Frame Timestamp Register LL-Byte. |
| SFD_VALUE |
Start of Frame Delimiter Value Register. |
| SHORT_ADDR_0 |
Transceiver MAC Short Address Register (Low Byte). |
| SHORT_ADDR_1 |
Transceiver MAC Short Address Register (High Byte). |
| SMCR |
Sleep Mode Control Register. |
| SP |
Stack Pointer. |
| SPCR |
SPI Control Register. |
| SPDR |
SPI Data Register. |
| SPH |
Stack Pointer high byte. |
| SPL |
Stack Pointer low byte. |
| SPMCSR |
Store Program Memory Control Register. |
| SPSR |
SPI Status Register. |
| SREG |
Status Register. |
| TCCR0A |
Timer/Counter0 Control Register A. |
| TCCR0B |
Timer/Counter0 Control Register B. |
| TCCR1A |
Timer/Counter1 Control Register A. |
| TCCR1B |
Timer/Counter1 Control Register B. |
| TCCR1C |
Timer/Counter1 Control Register C. |
| TCCR2A |
Timer/Counter2 Control Register A. |
| TCCR2B |
Timer/Counter2 Control Register B. |
| TCCR3A |
Timer/Counter3 Control Register A. |
| TCCR3B |
Timer/Counter3 Control Register B. |
| TCCR3C |
Timer/Counter3 Control Register C. |
| TCCR4A |
Timer/Counter4 Control Register A. |
| TCCR4B |
Timer/Counter4 Control Register B. |
| TCCR4C |
Timer/Counter4 Control Register C. |
| TCCR5A |
Timer/Counter5 Control Register A. |
| TCCR5B |
Timer/Counter5 Control Register B. |
| TCCR5C |
Timer/Counter5 Control Register C. |
| TCNT0 |
Timer/Counter0 Register. |
| TCNT1 |
Timer/Counter1 Bytes. |
| TCNT2 |
Timer/Counter2. |
| TCNT3 |
Timer/Counter3 Bytes. |
| TCNT4 |
Timer/Counter4 Bytes. |
| TCNT5 |
Timer/Counter5 Bytes. |
| TCNT1H |
Timer/Counter1 Bytes high byte. |
| TCNT1L |
Timer/Counter1 Bytes low byte. |
| TCNT3H |
Timer/Counter3 Bytes high byte. |
| TCNT3L |
Timer/Counter3 Bytes low byte. |
| TCNT4H |
Timer/Counter4 Bytes high byte. |
| TCNT4L |
Timer/Counter4 Bytes low byte. |
| TCNT5H |
Timer/Counter5 Bytes high byte. |
| TCNT5L |
Timer/Counter5 Bytes low byte. |
| TIFR0 |
Timer/Counter0 Interrupt Flag Register. |
| TIFR1 |
Timer/Counter1 Interrupt Flag Register. |
| TIFR2 |
Timer/Counter Interrupt Flag Register. |
| TIFR3 |
Timer/Counter3 Interrupt Flag Register. |
| TIFR4 |
Timer/Counter4 Interrupt Flag Register. |
| TIFR5 |
Timer/Counter5 Interrupt Flag Register. |
| TIMSK0 |
Timer/Counter0 Interrupt Mask Register. |
| TIMSK1 |
Timer/Counter1 Interrupt Mask Register. |
| TIMSK2 |
Timer/Counter Interrupt Mask register. |
| TIMSK3 |
Timer/Counter3 Interrupt Mask Register. |
| TIMSK4 |
Timer/Counter4 Interrupt Mask Register. |
| TIMSK5 |
Timer/Counter5 Interrupt Mask Register. |
| TRXFBEND |
End of frame buffer. |
| TRXFBST |
Start of frame buffer. |
| TRXPR |
Transceiver Pin Register. |
| TRX_CTRL_0 |
Reserved. |
| TRX_CTRL_1 |
Transceiver Control Register 1. |
| TRX_CTRL_2 |
Transceiver Control Register 2. |
| TRX_RPC |
Transceiver Reduced Power Consumption Control. |
| TRX_STATE |
Transceiver State Control Register. |
| TRX_STATUS |
Transceiver Status Register. |
| TST_CTRL_DIGI |
Transceiver Digital Test Control Register. |
| TST_RX_LENGTH |
Transceiver Received Frame Length Register. |
| TWAMR |
TWI (Slave) Address Mask Register. |
| TWAR |
TWI (Slave) Address Register. |
| TWBR |
TWI Bit Rate Register. |
| TWCR |
TWI Control Register. |
| TWDR |
TWI Data Register. |
| TWSR |
TWI Status Register. |
| UBRR0 |
USART0 Baud Rate Register Bytes. |
| UBRR1 |
USART1 Baud Rate Register Bytes. |
| UBRR0H |
USART0 Baud Rate Register Bytes high byte. |
| UBRR0L |
USART0 Baud Rate Register Bytes low byte. |
| UBRR1H |
USART1 Baud Rate Register Bytes high byte. |
| UBRR1L |
USART1 Baud Rate Register Bytes low byte. |
| UCSR0A |
USART0 MSPIM Control and Status Register A. |
| UCSR0B |
USART0 MSPIM Control and Status Register B. |
| UCSR0C |
USART0 MSPIM Control and Status Register C. |
| UCSR1A |
USART1 MSPIM Control and Status Register A. |
| UCSR1B |
USART1 MSPIM Control and Status Register B. |
| UCSR1C |
USART1 MSPIM Control and Status Register C. |
| UDR0 |
USART0 I/O Data Register. |
| UDR1 |
USART1 I/O Data Register. |
| VERSION_NUM |
Device Identification Register (Version Number). |
| VREG_CTRL |
Voltage Regulator Control and Status Register. |
| WDTCSR |
Watchdog Timer Control Register. |
| XAH_CTRL_0 |
Transceiver Extended Operating Mode Control Register. |
| XAH_CTRL_1 |
Transceiver Acknowledgment Frame Control Register 1. |
| XOSC_CTRL |
Crystal Oscillator Control Register. |