Module avrd::at90can128

The AVR AT90CAN128 microcontroller

Variants

	Pinout	Package	Operating temperature	Operating voltage	Max speed
AT90CAN128-16AI	TQFP64	TQFP64	-40°C - 85°C	2.7V - 5.5V	16 MHz
AT90CAN128-16MI	QFN64	QFN64	-40°C - 85°C	2.7V - 5.5V	16 MHz
AT90CAN128-16AU	TQFP64	TQFP64	-40°C - 85°C	2.7V - 5.5V	16 MHz
AT90CAN128-16MU	QFN64	QFN64	-40°C - 85°C	2.7V - 5.5V	16 MHz

Registers by module (not exhaustive)

PORT modules

• PORTA
  • PA0 (PA0)
  • PA1 (PA1)
  • PA2 (PA2)
  • PA3 (PA3)
  • PA4 (PA4)
  • PA5 (PA5)
  • PA6 (PA6)
  • PA7 (PA7)
• PORTB
  • PB0 (PB0)
  • PB1 (PB1)
  • PB2 (PB2)
  • PB3 (PB3)
  • PB4 (PB4)
  • PB5 (PB5)
  • PB6 (PB6)
  • PB7 (PB7)
• PORTC
  • PC0 (PC0)
  • PC1 (PC1)
  • PC2 (PC2)
  • PC3 (PC3)
  • PC4 (PC4)
  • PC5 (PC5)
  • PC6 (PC6)
  • PC7 (PC7)
• PORTD
  • PD0 (PD0)
  • PD1 (PD1)
  • PD2 (PD2)
  • PD3 (PD3)
  • PD4 (PD4)
  • PD5 (PD5)
  • PD6 (PD6)
  • PD7 (PD7)
• PORTE
  • PE0 (PE0)
  • PE1 (PE1)
  • PE2 (PE2)
  • PE3 (PE3)
  • PE4 (PE4)
  • PE5 (PE5)
  • PE6 (PE6)
  • PE7 (PE7)
• PORTF
  • PF0 (PF0)
  • PF1 (PF1)
  • PF2 (PF2)
  • PF3 (PF3)
  • PF4 (PF4)
  • PF5 (PF5)
  • PF6 (PF6)
  • PF7 (PF7)
• PORTG
  • PG0 (PG0)
  • PG1 (PG1)
  • PG2 (PG2)
  • PG3 (PG3)
  • PG4 (PG4)
  • PG5 (PG5)
  • PG6 (PG6)
  • PG7 (PG7)

JTAG modules

• JTAG
  • PF4 (PF4)
  • PF5 (PF5)
  • PF6 (PF6)
  • PF7 (PF7)

USART modules

• USART0
  • PE1 (PE1)
  • PE0 (PE0)
  • PE2 (PE2)
• USART1
  • PD3 (PD3)
  • PD2 (PD2)
  • PD5 (PD5)

EEPROM modules

• EEPROM

ADC modules

• ADC
  • PA0 (PA0)
  • PA1 (PA1)
  • PA2 (PA2)
  • PA3 (PA3)
  • PA4 (PA4)
  • PA5 (PA5)
  • PA6 (PA6)
  • PA7 (PA7)

Constants

ACSR	Analog Comparator Control And Status Register.
ADC	ADC Data Register Bytes.
ADCH	ADC Data Register Bytes high byte.
ADCL	ADC Data Register Bytes low byte.
ADCSRA	The ADC Control and Status register.
ADCSRB	ADC Control and Status Register B.
ADMUX	The ADC multiplexer Selection Register.
ASSR	Asynchronous Status Register.
CANBT1	Bit Timing Register 1.
CANBT2	Bit Timing Register 2.
CANBT3	Bit Timing Register 3.
CANCDMOB	MOb Control and DLC Register.
CANEN1	Enable MOb Register.
CANEN2	Enable MOb Register.
CANGCON	CAN General Control Register.
CANGIE	CAN General Interrupt Enable Register.
CANGIT	CAN General Interrupt Register.
CANGSTA	CAN General Status Register.
CANHPMOB	Highest Priority MOb Register.
CANIDM1	Identifier Mask Register 1.
CANIDM2	Identifier Mask Register 2.
CANIDM3	Identifier Mask Register 3.
CANIDM4	Identifier Mask Register 4.
CANIDT1	Identifier Tag Register 1.
CANIDT2	Identifier Tag Register 2.
CANIDT3	Identifier Tag Register 3.
CANIDT4	Identifier Tag Register 4.
CANIE1	Enable Interrupt MOb Register.
CANIE2	Enable Interrupt MOb Register.
CANMSG	Message Data Register.
CANPAGE	Page MOb Register.
CANREC	Receive Error Counter Register.
CANSIT1	CAN Status Interrupt MOb Register.
CANSIT2	CAN Status Interrupt MOb Register.
CANSTM	Time Stamp Register.
CANSTMH	Time Stamp Register high byte.
CANSTML	Time Stamp Register low byte.
CANSTMOB	MOb Status Register.
CANTCON	Timer Control Register.
CANTEC	Transmit Error Counter Register.
CANTIM	Timer Register.
CANTIMH	Timer Register high byte.
CANTIML	Timer Register low byte.
CANTTC	TTC Timer Register.
CANTTCH	TTC Timer Register high byte.
CANTTCL	TTC Timer Register low byte.
CLKPR	Clock Prescale Register.
DDRA	Port A Data Direction Register.
DDRB	Port B Data Direction Register.
DDRC	Port C Data Direction Register.
DDRD	Port D Data Direction Register.
DDRE	Data Direction Register, Port E.
DDRF	Data Direction Register, Port F.
DDRG	Data Direction Register, Port G.
DIDR0	Digital Input Disable Register 1.
DIDR1
EEAR	EEPROM Read/Write Access Bytes.
EEARH	EEPROM Read/Write Access Bytes high byte.
EEARL	EEPROM Read/Write Access Bytes low byte.
EECR	EEPROM Control Register.
EEDR	EEPROM Data Register.
EICRA	External Interrupt Control Register A.
EICRB	External Interrupt Control Register B.
EIFR	External Interrupt Flag Register.
EIMSK	External Interrupt Mask Register.
EXTENDED
GPIOR0	General Purpose IO Register 0.
GPIOR1	General Purpose IO Register 1.
GPIOR2	General Purpose IO Register 2.
GTCCR	General Timer/Counter Control Register.
HIGH
ICR1	Timer/Counter1 Input Capture Register Bytes.
ICR3	Timer/Counter3 Input Capture Register Bytes.
ICR1H	Timer/Counter1 Input Capture Register Bytes high byte.
ICR1L	Timer/Counter1 Input Capture Register Bytes low byte.
ICR3H	Timer/Counter3 Input Capture Register Bytes high byte.
ICR3L	Timer/Counter3 Input Capture Register Bytes low byte.
LOCKBIT
LOW
MCUCR	MCU Control Register.
MCUSR	MCU Status Register.
OCDR	On-Chip Debug Related Register in I/O Memory.
OCR0A	Timer/Counter0 Output Compare Register.
OCR1A	Timer/Counter1 Output Compare Register Bytes.
OCR1AH	Timer/Counter1 Output Compare Register Bytes high byte.
OCR1AL	Timer/Counter1 Output Compare Register Bytes low byte.
OCR1B	Timer/Counter1 Output Compare Register Bytes.
OCR1BH	Timer/Counter1 Output Compare Register Bytes high byte.
OCR1BL	Timer/Counter1 Output Compare Register Bytes low byte.
OCR1C	Timer/Counter1 Output Compare Register Bytes.
OCR1CH	Timer/Counter1 Output Compare Register Bytes high byte.
OCR1CL	Timer/Counter1 Output Compare Register Bytes low byte.
OCR2A	Timer/Counter2 Output Compare Register.
OCR3A	Timer/Counter3 Output Compare Register Bytes.
OCR3AH	Timer/Counter3 Output Compare Register Bytes high byte.
OCR3AL	Timer/Counter3 Output Compare Register Bytes low byte.
OCR3B	Timer/Counter3 Output Compare Register Bytes.
OCR3BH	Timer/Counter3 Output Compare Register Bytes high byte.
OCR3BL	Timer/Counter3 Output Compare Register Bytes low byte.
OCR3C	Timer/Counter3 Output Compare Register Bytes.
OCR3CH	Timer/Counter3 Output Compare Register Bytes high byte.
OCR3CL	Timer/Counter3 Output Compare Register Bytes low byte.
OSCCAL	Oscillator Calibration Value.
PINA	Port A Input Pins.
PINB	Port B Input Pins.
PINC	Port C Input Pins.
PIND	Port D Input Pins.
PINE	Input Pins, Port E.
PINF	Input Pins, Port F.
PING	Input Pins, Port G.
PORTA	Port A Data Register.
PORTB	Port B Data Register.
PORTC	Port C Data Register.
PORTD	Port D Data Register.
PORTE	Data Register, Port E.
PORTF	Data Register, Port F.
PORTG	Data Register, Port G.
RAMPZ	RAM Page Z Select Register.
SMCR	Sleep Mode Control Register.
SP	Stack Pointer.
SPCR	SPI Control Register.
SPDR	SPI Data Register.
SPH	Stack Pointer high byte.
SPL	Stack Pointer low byte.
SPMCSR	Store Program Memory Control Register.
SPSR	SPI Status Register.
SREG	Status Register.
TCCR0A	Timer/Counter0 Control Register.
TCCR1A	Timer/Counter1 Control Register A.
TCCR1B	Timer/Counter1 Control Register B.
TCCR1C	Timer/Counter 1 Control Register C.
TCCR2A	Timer/Counter2 Control Register.
TCCR3A	Timer/Counter3 Control Register A.
TCCR3B	Timer/Counter3 Control Register B.
TCCR3C	Timer/Counter 3 Control Register C.
TCNT0	Timer/Counter0.
TCNT1	Timer/Counter1 Bytes.
TCNT2	Timer/Counter2.
TCNT3	Timer/Counter3 Bytes.
TCNT1H	Timer/Counter1 Bytes high byte.
TCNT1L	Timer/Counter1 Bytes low byte.
TCNT3H	Timer/Counter3 Bytes high byte.
TCNT3L	Timer/Counter3 Bytes low byte.
TIFR0	Timer/Counter0 Interrupt Flag register.
TIFR1	Timer/Counter Interrupt Flag register.
TIFR2	Timer/Counter Interrupt Flag Register.
TIFR3	Timer/Counter Interrupt Flag register.
TIMSK0	Timer/Counter0 Interrupt Mask Register.
TIMSK1	Timer/Counter Interrupt Mask Register.
TIMSK2	Timer/Counter Interrupt Mask register.
TIMSK3	Timer/Counter Interrupt Mask Register.
TWAR	TWI (Slave) Address register.
TWBR	TWI Bit Rate register.
TWCR	TWI Control Register.
TWDR	TWI Data register.
TWSR	TWI Status Register.
UBRR0	USART Baud Rate Register t Bytes.
UBRR1	USART Baud Rate Register t Bytes.
UBRR0H	USART Baud Rate Register t Bytes high byte.
UBRR0L	USART Baud Rate Register t Bytes low byte.
UBRR1H	USART Baud Rate Register t Bytes high byte.
UBRR1L	USART Baud Rate Register t Bytes low byte.
UCSR0A	USART Control and Status Register A.
UCSR0B	USART Control and Status Register B.
UCSR0C	USART Control and Status Register C.
UCSR1A	USART Control and Status Register A.
UCSR1B	USART Control and Status Register B.
UCSR1C	USART Control and Status Register C.
UDR0	USART I/O Data Register.
UDR1	USART I/O Data Register.
WDTCR	Watchdog Timer Control Register.
XMCRA	External Memory Control Register A.
XMCRB	External Memory Control Register B.