Struct avr_device::attiny2313::cpu::mcucr::ISC1_W

pub struct ISC1_W<'a> { /* fields omitted */ }

Field ISC1 writer - Interrupt Sense Control 1 bits

Implementations

impl<'a> ISC1_W<'a>

pub fn variant(self, variant: ISC1_A) -> &'a mut W

Writes variant to the field

pub fn low(self) -> &'a mut W

The low level of INTx generates an interrupt request

pub fn toggle(self) -> &'a mut W

Any logical change on INTx generates an interrupt request

pub fn falling(self) -> &'a mut W

The falling edge of INTx generates an interrupt request

pub fn rising(self) -> &'a mut W

The rising edge of INTx generates an interrupt request

pub fn bits(self, value: u8) -> &'a mut W

Writes raw bits to the field