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#[doc = "Reader of register UCSR1A"] pub type R = crate::R<u8, super::UCSR1A>; #[doc = "Writer for register UCSR1A"] pub type W = crate::W<u8, super::UCSR1A>; #[doc = "Register UCSR1A `reset()`'s with value 0"] impl crate::ResetValue for super::UCSR1A { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } #[doc = "Reader of field `MPCM1`"] pub type MPCM1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `MPCM1`"] pub struct MPCM1_W<'a> { w: &'a mut W, } impl<'a> MPCM1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u8) & 0x01); self.w } } #[doc = "Reader of field `U2X1`"] pub type U2X1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `U2X1`"] pub struct U2X1_W<'a> { w: &'a mut W, } impl<'a> U2X1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u8) & 0x01) << 1); self.w } } #[doc = "Reader of field `UPE1`"] pub type UPE1_R = crate::R<bool, bool>; #[doc = "Reader of field `DOR1`"] pub type DOR1_R = crate::R<bool, bool>; #[doc = "Reader of field `FE1`"] pub type FE1_R = crate::R<bool, bool>; #[doc = "Reader of field `UDRE1`"] pub type UDRE1_R = crate::R<bool, bool>; #[doc = "Reader of field `TXC1`"] pub type TXC1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TXC1`"] pub struct TXC1_W<'a> { w: &'a mut W, } impl<'a> TXC1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u8) & 0x01) << 6); self.w } } #[doc = "Reader of field `RXC1`"] pub type RXC1_R = crate::R<bool, bool>; impl R { #[doc = "Bit 0 - Multi-processor Communication Mode"] #[inline(always)] pub fn mpcm1(&self) -> MPCM1_R { MPCM1_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Double the USART transmission speed"] #[inline(always)] pub fn u2x1(&self) -> U2X1_R { U2X1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Parity Error"] #[inline(always)] pub fn upe1(&self) -> UPE1_R { UPE1_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Data overRun"] #[inline(always)] pub fn dor1(&self) -> DOR1_R { DOR1_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Framing Error"] #[inline(always)] pub fn fe1(&self) -> FE1_R { FE1_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - USART Data Register Empty"] #[inline(always)] pub fn udre1(&self) -> UDRE1_R { UDRE1_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - USART Transmit Complete"] #[inline(always)] pub fn txc1(&self) -> TXC1_R { TXC1_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - USART Receive Complete"] #[inline(always)] pub fn rxc1(&self) -> RXC1_R { RXC1_R::new(((self.bits >> 7) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Multi-processor Communication Mode"] #[inline(always)] pub fn mpcm1(&mut self) -> MPCM1_W { MPCM1_W { w: self } } #[doc = "Bit 1 - Double the USART transmission speed"] #[inline(always)] pub fn u2x1(&mut self) -> U2X1_W { U2X1_W { w: self } } #[doc = "Bit 6 - USART Transmit Complete"] #[inline(always)] pub fn txc1(&mut self) -> TXC1_W { TXC1_W { w: self } } }