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#[doc = "Reader of register UCSR1B"] pub type R = crate::R<u8, super::UCSR1B>; #[doc = "Writer for register UCSR1B"] pub type W = crate::W<u8, super::UCSR1B>; #[doc = "Register UCSR1B `reset()`'s with value 0"] impl crate::ResetValue for super::UCSR1B { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } #[doc = "Reader of field `TXB81`"] pub type TXB81_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TXB81`"] pub struct TXB81_W<'a> { w: &'a mut W, } impl<'a> TXB81_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u8) & 0x01); self.w } } #[doc = "Reader of field `RXB81`"] pub type RXB81_R = crate::R<bool, bool>; #[doc = "Reader of field `UCSZ12`"] pub type UCSZ12_R = crate::R<bool, bool>; #[doc = "Write proxy for field `UCSZ12`"] pub struct UCSZ12_W<'a> { w: &'a mut W, } impl<'a> UCSZ12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u8) & 0x01) << 2); self.w } } #[doc = "Reader of field `TXEN1`"] pub type TXEN1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TXEN1`"] pub struct TXEN1_W<'a> { w: &'a mut W, } impl<'a> TXEN1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u8) & 0x01) << 3); self.w } } #[doc = "Reader of field `RXEN1`"] pub type RXEN1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `RXEN1`"] pub struct RXEN1_W<'a> { w: &'a mut W, } impl<'a> RXEN1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u8) & 0x01) << 4); self.w } } #[doc = "Reader of field `UDRIE1`"] pub type UDRIE1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `UDRIE1`"] pub struct UDRIE1_W<'a> { w: &'a mut W, } impl<'a> UDRIE1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u8) & 0x01) << 5); self.w } } #[doc = "Reader of field `TXCIE1`"] pub type TXCIE1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TXCIE1`"] pub struct TXCIE1_W<'a> { w: &'a mut W, } impl<'a> TXCIE1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u8) & 0x01) << 6); self.w } } #[doc = "Reader of field `RXCIE1`"] pub type RXCIE1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `RXCIE1`"] pub struct RXCIE1_W<'a> { w: &'a mut W, } impl<'a> RXCIE1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u8) & 0x01) << 7); self.w } } impl R { #[doc = "Bit 0 - Transmit Data Bit 8"] #[inline(always)] pub fn txb81(&self) -> TXB81_R { TXB81_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Receive Data Bit 8"] #[inline(always)] pub fn rxb81(&self) -> RXB81_R { RXB81_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Character Size"] #[inline(always)] pub fn ucsz12(&self) -> UCSZ12_R { UCSZ12_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Transmitter Enable"] #[inline(always)] pub fn txen1(&self) -> TXEN1_R { TXEN1_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Receiver Enable"] #[inline(always)] pub fn rxen1(&self) -> RXEN1_R { RXEN1_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - USART Data register Empty Interrupt Enable"] #[inline(always)] pub fn udrie1(&self) -> UDRIE1_R { UDRIE1_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - TX Complete Interrupt Enable"] #[inline(always)] pub fn txcie1(&self) -> TXCIE1_R { TXCIE1_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - RX Complete Interrupt Enable"] #[inline(always)] pub fn rxcie1(&self) -> RXCIE1_R { RXCIE1_R::new(((self.bits >> 7) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transmit Data Bit 8"] #[inline(always)] pub fn txb81(&mut self) -> TXB81_W { TXB81_W { w: self } } #[doc = "Bit 2 - Character Size"] #[inline(always)] pub fn ucsz12(&mut self) -> UCSZ12_W { UCSZ12_W { w: self } } #[doc = "Bit 3 - Transmitter Enable"] #[inline(always)] pub fn txen1(&mut self) -> TXEN1_W { TXEN1_W { w: self } } #[doc = "Bit 4 - Receiver Enable"] #[inline(always)] pub fn rxen1(&mut self) -> RXEN1_W { RXEN1_W { w: self } } #[doc = "Bit 5 - USART Data register Empty Interrupt Enable"] #[inline(always)] pub fn udrie1(&mut self) -> UDRIE1_W { UDRIE1_W { w: self } } #[doc = "Bit 6 - TX Complete Interrupt Enable"] #[inline(always)] pub fn txcie1(&mut self) -> TXCIE1_W { TXCIE1_W { w: self } } #[doc = "Bit 7 - RX Complete Interrupt Enable"] #[inline(always)] pub fn rxcie1(&mut self) -> RXCIE1_W { RXCIE1_W { w: self } } }