[][src]Struct atsams70q20::SCB

pub struct SCB { /* fields omitted */ }

System Control Block

Methods

impl SCB[src]

pub fn vect_active() -> VectActive[src]

Returns the active exception number

impl SCB[src]

pub fn enable_icache(&mut self)[src]

Enables I-Cache if currently disabled

pub fn disable_icache(&mut self)[src]

Disables I-Cache if currently enabled

pub fn icache_enabled() -> bool[src]

Returns whether the I-Cache is currently enabled

pub fn invalidate_icache(&mut self)[src]

Invalidates I-Cache

pub fn enable_dcache(&mut self, cpuid: &mut CPUID)[src]

Enables D-cache if currently disabled

pub fn disable_dcache(&mut self, cpuid: &mut CPUID)[src]

Disables D-cache if currently enabled

pub fn dcache_enabled() -> bool[src]

Returns whether the D-Cache is currently enabled

pub fn clean_dcache(&mut self, cpuid: &mut CPUID)[src]

Cleans D-cache

pub fn clean_invalidate_dcache(&mut self, cpuid: &mut CPUID)[src]

Cleans and invalidates D-cache

pub fn invalidate_dcache_by_address(&mut self, addr: usize, size: usize)[src]

Invalidates D-cache by address

addr: the address to invalidate size: size of the memory block, in number of bytes

Invalidates cache starting from the lowest 32-byte aligned address represented by addr, in blocks of 32 bytes until at least size bytes have been invalidated.

pub fn clean_dcache_by_address(&mut self, addr: usize, size: usize)[src]

Cleans D-cache by address

addr: the address to clean size: size of the memory block, in number of bytes

Cleans cache starting from the lowest 32-byte aligned address represented by addr, in blocks of 32 bytes until at least size bytes have been cleaned.

pub fn clean_invalidate_dcache_by_address(&mut self, addr: usize, size: usize)[src]

Cleans and invalidates D-cache by address

addr: the address to clean and invalidate size: size of the memory block, in number of bytes

Cleans and invalidates cache starting from the lowest 32-byte aligned address represented by addr, in blocks of 32 bytes until at least size bytes have been cleaned and invalidated.

impl SCB[src]

pub fn set_sleepdeep(&mut self)[src]

Set the SLEEPDEEP bit in the SCR register

pub fn clear_sleepdeep(&mut self)[src]

Clear the SLEEPDEEP bit in the SCR register

impl SCB[src]

pub fn set_sleeponexit(&mut self)[src]

Set the SLEEPONEXIT bit in the SCR register

pub fn clear_sleeponexit(&mut self)[src]

Clear the SLEEPONEXIT bit in the SCR register

impl SCB[src]

pub fn system_reset(&mut self) -> ![src]

Initiate a system reset request to reset the MCU

impl SCB[src]

pub fn set_pendsv()[src]

Set the PENDSVSET bit in the ICSR register which will pend the PendSV interrupt

pub fn is_pendsv_pending() -> bool[src]

Check if PENDSVSET bit in the ICSR register is set meaning PendSV interrupt is pending

pub fn clear_pendsv()[src]

Set the PENDSVCLR bit in the ICSR register which will clear a pending PendSV interrupt

pub fn set_pendst()[src]

Set the PENDSTCLR bit in the ICSR register which will clear a pending SysTick interrupt

pub fn is_pendst_pending() -> bool[src]

Check if PENDSTSET bit in the ICSR register is set meaning SysTick interrupt is pending

pub fn clear_pendst()[src]

Set the PENDSTCLR bit in the ICSR register which will clear a pending SysTick interrupt

impl SCB[src]

pub fn get_priority(system_handler: SystemHandler) -> u8[src]

Returns the hardware priority of system_handler

NOTE: Hardware priority does not exactly match logical priority levels. See NVIC.get_priority for more details.

pub unsafe fn set_priority(&mut self, system_handler: SystemHandler, prio: u8)[src]

Sets the hardware priority of system_handler to prio

NOTE: Hardware priority does not exactly match logical priority levels. See NVIC.get_priority for more details.

On ARMv6-M, updating a system handler priority requires a read-modify-write operation. On ARMv7-M, the operation is performed in a single, atomic write operation.

Unsafety

Changing priority levels can break priority-based critical sections (see register::basepri) and compromise memory safety.

impl SCB[src]

pub fn ptr() -> *const RegisterBlock[src]

Returns a pointer to the register block

Trait Implementations

impl Send for SCB[src]

impl Deref for SCB[src]

type Target = RegisterBlock

The resulting type after dereferencing.

Auto Trait Implementations

impl Unpin for SCB

impl !Sync for SCB

Blanket Implementations

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> From<T> for T[src]

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self