Module atsams70q19::twihs0::twihs_cr

Control Register

Structs

ACMDIS_W

Field ACMDIS writer - Alternative Command Mode Disable

ACMEN_W

Field ACMEN writer - Alternative Command Mode Enable

CLEAR_W

Field CLEAR writer - Bus CLEAR Command

FIFODIS_W

Field FIFODIS writer - FIFO Disable

FIFOEN_W

Field FIFOEN writer - FIFO Enable

HSDIS_W

Field HSDIS writer - TWIHS High-Speed Mode Disabled

HSEN_W

Field HSEN writer - TWIHS High-Speed Mode Enabled

LOCKCLR_W

Field LOCKCLR writer - Lock Clear

MSDIS_W

Field MSDIS writer - TWIHS Master Mode Disabled

MSEN_W

Field MSEN writer - TWIHS Master Mode Enabled

PECDIS_W

Field PECDIS writer - Packet Error Checking Disable

PECEN_W

Field PECEN writer - Packet Error Checking Enable

PECRQ_W

Field PECRQ writer - PEC Request

QUICK_W

Field QUICK writer - SMBus Quick Command

SMBDIS_W

Field SMBDIS writer - SMBus Mode Disabled

SMBEN_W

Field SMBEN writer - SMBus Mode Enabled

START_W

Field START writer - Send a START Condition

STOP_W

Field STOP writer - Send a STOP Condition

SVDIS_W

Field SVDIS writer - TWIHS Slave Mode Disabled

SVEN_W

Field SVEN writer - TWIHS Slave Mode Enabled

SWRST_W

Field SWRST writer - Software Reset

THRCLR_W

Field THRCLR writer - Transmit Holding Register Clear

TWIHS_CR_SPEC

Control Register

W

Register TWIHS_CR writer