Module atsams70q19::pwm0::pwm_clk

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Expand description

PWM Clock Register

Structs

DIVA_R

Field DIVA reader - CLKA Divide Factor

DIVA_W

Field DIVA writer - CLKA Divide Factor

DIVB_R

Field DIVB reader - CLKB Divide Factor

DIVB_W

Field DIVB writer - CLKB Divide Factor

PREA_R

Field PREA reader - CLKA Source Clock Selection

PREA_W

Field PREA writer - CLKA Source Clock Selection

PREB_R

Field PREB reader - CLKB Source Clock Selection

PREB_W

Field PREB writer - CLKB Source Clock Selection

PWM_CLK_SPEC

PWM Clock Register

R

Register PWM_CLK reader

W

Register PWM_CLK writer

Enums

DIVA_A

CLKA Divide Factor

DIVB_A

CLKB Divide Factor

PREA_A

CLKA Source Clock Selection

PREB_A

CLKB Source Clock Selection