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#[doc = r"Value read from the register"] pub struct R { bits: u32, } #[doc = r"Value to write to the register"] pub struct W { bits: u32, } impl super::HSMCI_CFG { #[doc = r"Modifies the contents of the register"] #[inline(always)] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); self.register.set(f(&R { bits }, &mut W { bits }).bits); } #[doc = r"Reads the contents of the register"] #[inline(always)] pub fn read(&self) -> R { R { bits: self.register.get(), } } #[doc = r"Writes to the register"] #[inline(always)] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { self.register.set( f(&mut W { bits: Self::reset_value(), }) .bits, ); } #[doc = r"Reset value of the register"] #[inline(always)] pub const fn reset_value() -> u32 { 0 } #[doc = r"Writes the reset value to the register"] #[inline(always)] pub fn reset(&self) { self.register.set(Self::reset_value()) } } #[doc = r"Reader of the field"] pub type FIFOMODE_R = crate::FR<bool, bool>; #[doc = r"Proxy"] pub struct _FIFOMODEW<'a> { w: &'a mut W, } impl<'a> _FIFOMODEW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = r"Reader of the field"] pub type FERRCTRL_R = crate::FR<bool, bool>; #[doc = r"Proxy"] pub struct _FERRCTRLW<'a> { w: &'a mut W, } impl<'a> _FERRCTRLW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = r"Reader of the field"] pub type HSMODE_R = crate::FR<bool, bool>; #[doc = r"Proxy"] pub struct _HSMODEW<'a> { w: &'a mut W, } impl<'a> _HSMODEW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = r"Reader of the field"] pub type LSYNC_R = crate::FR<bool, bool>; #[doc = r"Proxy"] pub struct _LSYNCW<'a> { w: &'a mut W, } impl<'a> _LSYNCW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } impl R { #[doc = r"Value of the register as raw bits"] #[inline(always)] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bit 0 - HSMCI Internal FIFO control mode"] #[inline(always)] pub fn fifomode(&self) -> FIFOMODE_R { FIFOMODE_R::new((self.bits() & 0x01) != 0) } #[doc = "Bit 4 - Flow Error flag reset control mode"] #[inline(always)] pub fn ferrctrl(&self) -> FERRCTRL_R { FERRCTRL_R::new(((self.bits() >> 4) & 0x01) != 0) } #[doc = "Bit 8 - High Speed Mode"] #[inline(always)] pub fn hsmode(&self) -> HSMODE_R { HSMODE_R::new(((self.bits() >> 8) & 0x01) != 0) } #[doc = "Bit 12 - Synchronize on the last block"] #[inline(always)] pub fn lsync(&self) -> LSYNC_R { LSYNC_R::new(((self.bits() >> 12) & 0x01) != 0) } } impl W { #[doc = r"Writes raw bits to the register"] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bit 0 - HSMCI Internal FIFO control mode"] #[inline(always)] pub fn fifomode(&mut self) -> _FIFOMODEW { _FIFOMODEW { w: self } } #[doc = "Bit 4 - Flow Error flag reset control mode"] #[inline(always)] pub fn ferrctrl(&mut self) -> _FERRCTRLW { _FERRCTRLW { w: self } } #[doc = "Bit 8 - High Speed Mode"] #[inline(always)] pub fn hsmode(&mut self) -> _HSMODEW { _HSMODEW { w: self } } #[doc = "Bit 12 - Synchronize on the last block"] #[inline(always)] pub fn lsync(&mut self) -> _LSYNCW { _LSYNCW { w: self } } }