1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176
#[doc = "Reader of register GMAC_WOL"] pub type R = crate::R<u32, super::GMAC_WOL>; #[doc = "Writer for register GMAC_WOL"] pub type W = crate::W<u32, super::GMAC_WOL>; #[doc = "Register GMAC_WOL `reset()`'s with value 0"] impl crate::ResetValue for super::GMAC_WOL { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `IP`"] pub type IP_R = crate::R<u16, u16>; #[doc = "Write proxy for field `IP`"] pub struct IP_W<'a> { w: &'a mut W, } impl<'a> IP_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); self.w } } #[doc = "Reader of field `MAG`"] pub type MAG_R = crate::R<bool, bool>; #[doc = "Write proxy for field `MAG`"] pub struct MAG_W<'a> { w: &'a mut W, } impl<'a> MAG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } #[doc = "Reader of field `ARP`"] pub type ARP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ARP`"] pub struct ARP_W<'a> { w: &'a mut W, } impl<'a> ARP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Reader of field `SA1`"] pub type SA1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SA1`"] pub struct SA1_W<'a> { w: &'a mut W, } impl<'a> SA1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "Reader of field `MTI`"] pub type MTI_R = crate::R<bool, bool>; #[doc = "Write proxy for field `MTI`"] pub struct MTI_W<'a> { w: &'a mut W, } impl<'a> MTI_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); self.w } } impl R { #[doc = "Bits 0:15 - ARP Request IP Address"] #[inline(always)] pub fn ip(&self) -> IP_R { IP_R::new((self.bits & 0xffff) as u16) } #[doc = "Bit 16 - Magic Packet Event Enable"] #[inline(always)] pub fn mag(&self) -> MAG_R { MAG_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - ARP Request IP Address"] #[inline(always)] pub fn arp(&self) -> ARP_R { ARP_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - Specific Address Register 1 Event Enable"] #[inline(always)] pub fn sa1(&self) -> SA1_R { SA1_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - Multicast Hash Event Enable"] #[inline(always)] pub fn mti(&self) -> MTI_R { MTI_R::new(((self.bits >> 19) & 0x01) != 0) } } impl W { #[doc = "Bits 0:15 - ARP Request IP Address"] #[inline(always)] pub fn ip(&mut self) -> IP_W { IP_W { w: self } } #[doc = "Bit 16 - Magic Packet Event Enable"] #[inline(always)] pub fn mag(&mut self) -> MAG_W { MAG_W { w: self } } #[doc = "Bit 17 - ARP Request IP Address"] #[inline(always)] pub fn arp(&mut self) -> ARP_W { ARP_W { w: self } } #[doc = "Bit 18 - Specific Address Register 1 Event Enable"] #[inline(always)] pub fn sa1(&mut self) -> SA1_W { SA1_W { w: self } } #[doc = "Bit 19 - Multicast Hash Event Enable"] #[inline(always)] pub fn mti(&mut self) -> MTI_W { MTI_W { w: self } } }