[][src]Module atsame54p20a::tal

Trigger Allocator

Modules

brkstatus

Break Request Status

cpuirqs0_

Interrupt Status m for CPU n - Group 0

cpuirqs1_

Interrupt Status m for CPU n - Group 1

ctictrla

Cross-Trigger Interface n Control A

ctimask

Cross-Trigger Interface n Mask

ctrla

Control A

dmacpusel0

DMA Channel Interrupts CPU Select 0

dmacpusel1

DMA Channel Interrupts CPU Select 1

eiccpusel0

EIC External Interrupts CPU Select 0

evcpusel0

EVSYS Channel Interrupts CPU Select 0

evctrl

Event Control

extctrl

External Break Control

globmask

Global Break Requests Mask

halt

Debug Halt Request

intcpusel0

Interrupts CPU Select 0

intcpusel1

Interrupts CPU Select 1

intcpusel2

Interrupts CPU Select 2

intcpusel3

Interrupts CPU Select 3

intcpusel4

Interrupts CPU Select 4

intcpusel5

Interrupts CPU Select 5

intcpusel6

Interrupts CPU Select 6

intcpusel7

Interrupts CPU Select 7

intcpusel8

Interrupts CPU Select 8

intenclr

Interrupt Enable Clear

intenset

Interrupt Enable Set

intflag

Interrupt Flag Status and Clear

intstatus

Interrupt n Status

irqmon

Interrupt Monitor Select

irqtrig

Interrupt Trigger

restart

Debug Restart Request

sflag

Inter-Process Signal Flag

sflagclr

Inter-Process Signal Flag Clear

sflagclrr

Inter-Process Signal Flag Bit n

sflagset

Inter-Process Signal Flag Set

smask0_

Inter-Process Signal Mask m for CPU n - Group 0

smask1_

Inter-Process Signal Mask m for CPU n - Group 1

Structs

RegisterBlock

Register block

Type Definitions

BRKSTATUS

Break Request Status

CPUIRQS0_

Interrupt Status m for CPU n - Group 0

CPUIRQS1_

Interrupt Status m for CPU n - Group 1

CTICTRLA

Cross-Trigger Interface n Control A

CTIMASK

Cross-Trigger Interface n Mask

CTRLA

Control A

DMACPUSEL0

DMA Channel Interrupts CPU Select 0

DMACPUSEL1

DMA Channel Interrupts CPU Select 1

EICCPUSEL0

EIC External Interrupts CPU Select 0

EVCPUSEL0

EVSYS Channel Interrupts CPU Select 0

EVCTRL

Event Control

EXTCTRL

External Break Control

GLOBMASK

Global Break Requests Mask

HALT

Debug Halt Request

INTCPUSEL0

Interrupts CPU Select 0

INTCPUSEL1

Interrupts CPU Select 1

INTCPUSEL2

Interrupts CPU Select 2

INTCPUSEL3

Interrupts CPU Select 3

INTCPUSEL4

Interrupts CPU Select 4

INTCPUSEL5

Interrupts CPU Select 5

INTCPUSEL6

Interrupts CPU Select 6

INTCPUSEL7

Interrupts CPU Select 7

INTCPUSEL8

Interrupts CPU Select 8

INTENCLR

Interrupt Enable Clear

INTENSET

Interrupt Enable Set

INTFLAG

Interrupt Flag Status and Clear

INTSTATUS

Interrupt n Status

IRQMON

Interrupt Monitor Select

IRQTRIG

Interrupt Trigger

RESTART

Debug Restart Request

SFLAG

Inter-Process Signal Flag

SFLAGCLR

Inter-Process Signal Flag Clear

SFLAGCLRR

Inter-Process Signal Flag Bit n

SFLAGSET

Inter-Process Signal Flag Set

SMASK0_

Inter-Process Signal Mask m for CPU n - Group 0

SMASK1_

Inter-Process Signal Mask m for CPU n - Group 1