Struct atsame54n19a_pac::sdhc0::RegisterBlock[−][src]

#[repr(C)]pub struct RegisterBlock {
    pub bsr: BSR,
    pub bcr: BCR,
    pub arg1r: ARG1R,
    pub tmr: TMR,
    pub cr: CR,
    pub rr: [RR; 4],
    pub bdpr: BDPR,
    pub psr: PSR,
    pub pcr: PCR,
    pub wcr: WCR,
    pub ccr: CCR,
    pub tcr: TCR,
    pub srr: SRR,
    pub acesr: ACESR,
    pub ca0r: CA0R,
    pub ca1r: CA1R,
    pub mccar: MCCAR,
    pub feraces: FERACES,
    pub fereis: FEREIS,
    pub aesr: AESR,
    pub asar: [ASAR; 1],
    pub pvr: [PVR; 8],
    pub sisr: SISR,
    pub hcvr: HCVR,
    pub mc1r: MC1R,
    pub mc2r: MC2R,
    pub acr: ACR,
    pub cc2r: CC2R,
    pub cacr: CACR,
    pub dbgr: DBGR,
    // some fields omitted
}

Register block

Fields

bsr: BSR

0x04 - Block Size

bcr: BCR

0x06 - Block Count

arg1r: ARG1R

0x08 - Argument 1

tmr: TMR

0x0c - Transfer Mode

cr: CR

0x0e - Command

rr: [RR; 4]

0x10 - Response

bdpr: BDPR

0x20 - Buffer Data Port

psr: PSR

0x24 - Present State

pcr: PCR

0x29 - Power Control

wcr: WCR

0x2b - Wakeup Control

ccr: CCR

0x2c - Clock Control

tcr: TCR

0x2e - Timeout Control

srr: SRR

0x2f - Software Reset

acesr: ACESR

0x3c - Auto CMD Error Status

ca0r: CA0R

0x40 - Capabilities 0

ca1r: CA1R

0x44 - Capabilities 1

mccar: MCCAR

0x48 - Maximum Current Capabilities

feraces: FERACES

0x50 - Force Event for Auto CMD Error Status

fereis: FEREIS

0x52 - Force Event for Error Interrupt Status

aesr: AESR

0x54 - ADMA Error Status

asar: [ASAR; 1]

0x58 - ADMA System Address

pvr: [PVR; 8]

0x60 - Preset Value n

sisr: SISR

0xfc - Slot Interrupt Status

hcvr: HCVR

0xfe - Host Controller Version

mc1r: MC1R

0x204 - MMC Control 1

mc2r: MC2R

0x205 - MMC Control 2

acr: ACR

0x208 - AHB Control

cc2r: CC2R

0x20c - Clock Control 2

cacr: CACR

0x230 - Capabilities Control

dbgr: DBGR

0x234 - Debug

Implementations

impl RegisterBlock[src]

pub fn ssar_cmd23_mode(&self) -> &SSAR_CMD23_MODE[src]

0x00 - SDMA System Address / Argument 2

pub fn ssar_cmd23_mode_mut(&self) -> &mut SSAR_CMD23_MODE[src]

0x00 - SDMA System Address / Argument 2

pub fn ssar(&self) -> &SSAR[src]

0x00 - SDMA System Address / Argument 2

pub fn ssar_mut(&self) -> &mut SSAR[src]

0x00 - SDMA System Address / Argument 2

pub fn hc1r_emmc_mode(&self) -> &HC1R_EMMC_MODE[src]

0x28 - Host Control 1

pub fn hc1r_emmc_mode_mut(&self) -> &mut HC1R_EMMC_MODE[src]

0x28 - Host Control 1

pub fn hc1r(&self) -> &HC1R[src]

0x28 - Host Control 1

pub fn hc1r_mut(&self) -> &mut HC1R[src]

0x28 - Host Control 1

pub fn bgcr_emmc_mode(&self) -> &BGCR_EMMC_MODE[src]

0x2a - Block Gap Control

pub fn bgcr_emmc_mode_mut(&self) -> &mut BGCR_EMMC_MODE[src]

0x2a - Block Gap Control

pub fn bgcr(&self) -> &BGCR[src]

0x2a - Block Gap Control

pub fn bgcr_mut(&self) -> &mut BGCR[src]

0x2a - Block Gap Control

pub fn nistr_emmc_mode(&self) -> &NISTR_EMMC_MODE[src]

0x30 - Normal Interrupt Status

pub fn nistr_emmc_mode_mut(&self) -> &mut NISTR_EMMC_MODE[src]

0x30 - Normal Interrupt Status

pub fn nistr(&self) -> &NISTR[src]

0x30 - Normal Interrupt Status

pub fn nistr_mut(&self) -> &mut NISTR[src]

0x30 - Normal Interrupt Status

pub fn eistr_emmc_mode(&self) -> &EISTR_EMMC_MODE[src]

0x32 - Error Interrupt Status

pub fn eistr_emmc_mode_mut(&self) -> &mut EISTR_EMMC_MODE[src]

0x32 - Error Interrupt Status

pub fn eistr(&self) -> &EISTR[src]

0x32 - Error Interrupt Status

pub fn eistr_mut(&self) -> &mut EISTR[src]

0x32 - Error Interrupt Status

pub fn nister_emmc_mode(&self) -> &NISTER_EMMC_MODE[src]

0x34 - Normal Interrupt Status Enable

pub fn nister_emmc_mode_mut(&self) -> &mut NISTER_EMMC_MODE[src]

0x34 - Normal Interrupt Status Enable

pub fn nister(&self) -> &NISTER[src]

0x34 - Normal Interrupt Status Enable

pub fn nister_mut(&self) -> &mut NISTER[src]

0x34 - Normal Interrupt Status Enable

pub fn eister_emmc_mode(&self) -> &EISTER_EMMC_MODE[src]

0x36 - Error Interrupt Status Enable

pub fn eister_emmc_mode_mut(&self) -> &mut EISTER_EMMC_MODE[src]

0x36 - Error Interrupt Status Enable

pub fn eister(&self) -> &EISTER[src]

0x36 - Error Interrupt Status Enable

pub fn eister_mut(&self) -> &mut EISTER[src]

0x36 - Error Interrupt Status Enable

pub fn nisier_emmc_mode(&self) -> &NISIER_EMMC_MODE[src]

0x38 - Normal Interrupt Signal Enable

pub fn nisier_emmc_mode_mut(&self) -> &mut NISIER_EMMC_MODE[src]

0x38 - Normal Interrupt Signal Enable

pub fn nisier(&self) -> &NISIER[src]

0x38 - Normal Interrupt Signal Enable

pub fn nisier_mut(&self) -> &mut NISIER[src]

0x38 - Normal Interrupt Signal Enable

pub fn eisier_emmc_mode(&self) -> &EISIER_EMMC_MODE[src]

0x3a - Error Interrupt Signal Enable

pub fn eisier_emmc_mode_mut(&self) -> &mut EISIER_EMMC_MODE[src]

0x3a - Error Interrupt Signal Enable

pub fn eisier(&self) -> &EISIER[src]

0x3a - Error Interrupt Signal Enable

pub fn eisier_mut(&self) -> &mut EISIER[src]

0x3a - Error Interrupt Signal Enable

pub fn hc2r_emmc_mode(&self) -> &HC2R_EMMC_MODE[src]

0x3e - Host Control 2

pub fn hc2r_emmc_mode_mut(&self) -> &mut HC2R_EMMC_MODE[src]

0x3e - Host Control 2

pub fn hc2r(&self) -> &HC2R[src]

0x3e - Host Control 2

pub fn hc2r_mut(&self) -> &mut HC2R[src]

0x3e - Host Control 2

Auto Trait Implementations

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impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

impl<T> BorrowMut<T> for T where
    T: ?Sized, [src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, [src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, [src]

type Error = Infallible

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impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

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