Module atsame53j18a_pac::sdhc0::ccr[−][src]

Clock Control

Structs

CLKGSEL_W	Write proxy for field `CLKGSEL`
INTCLKEN_W	Write proxy for field `INTCLKEN`
INTCLKS_W	Write proxy for field `INTCLKS`
SDCLKEN_W	Write proxy for field `SDCLKEN`
SDCLKFSEL_W	Write proxy for field `SDCLKFSEL`
USDCLKFSEL_W	Write proxy for field `USDCLKFSEL`

Enums

CLKGSEL_A	Clock Generator Select
INTCLKEN_A	Internal Clock Enable
INTCLKS_A	Internal Clock Stable
SDCLKEN_A	SD Clock Enable

Type Definitions

CLKGSEL_R	Reader of field `CLKGSEL`
INTCLKEN_R	Reader of field `INTCLKEN`
INTCLKS_R	Reader of field `INTCLKS`
R	Reader of register CCR
SDCLKEN_R	Reader of field `SDCLKEN`
SDCLKFSEL_R	Reader of field `SDCLKFSEL`
USDCLKFSEL_R	Reader of field `USDCLKFSEL`
W	Writer for register CCR