Crate atsame53j

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Expand description

Peripheral access API for ATSAME53J microcontrollers (generated using svd2rust v0.30.2 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports§

  • pub use self::adc0 as adc1;
  • pub use self::sercom0 as sercom1;
  • pub use self::sercom0 as sercom2;
  • pub use self::sercom0 as sercom3;
  • pub use self::sercom0 as sercom4;
  • pub use self::sercom0 as sercom5;
  • pub use self::tc0 as tc1;
  • pub use self::tc0 as tc2;
  • pub use self::tc0 as tc3;
  • pub use self::tc0 as tc4;
  • pub use self::tc0 as tc5;
  • pub use self::tcc0 as tcc1;
  • pub use self::tcc0 as tcc2;
  • pub use self::tcc0 as tcc3;
  • pub use self::tcc0 as tcc4;

Modules§

  • Analog Comparators
  • Analog Digital Converter
  • Advanced Encryption Standard
  • Configurable Custom Logic
  • Cortex M Cache Controller
  • Core Debug Register
  • Digital-to-Analog Converter
  • Direct Memory Access Controller
  • Device Service Unit
  • External Interrupt Controller
  • Embedded Trace Macrocell
  • Event System Interface
  • Frequency Meter
  • Generic Clock Generator
  • Common register and bit access and modify traits
  • Ethernet MAC
  • HSB Matrix
  • Inter-IC Sound Interface
  • Integrity Check Monitor
  • Main Clock
  • Non-Volatile Memory Controller
  • 32kHz Oscillators Control
  • Oscillators Control
  • Peripheral Access Controller
  • Parallel Capture Controller
  • Quadrature Decodeur
  • Power Manager
  • Port Module
  • Quad SPI interface
  • RAM ECC
  • Reset Controller
  • Real-Time Counter
  • SD/MMC Host Controller
  • Serial Communication Interface
  • Supply Controller
  • System timer
  • System Control Registers
  • Basic Timer Counter
  • Timer Counter Control
  • Trace Port Interface Register
  • True Random Generator
  • Universal Serial Bus
  • Watchdog Timer

Structs§

  • Analog Comparators
  • Analog Digital Converter
  • Analog Digital Converter
  • Advanced Encryption Standard
  • Cache and branch predictor maintenance operations
  • Configurable Custom Logic
  • Cortex M Cache Controller
  • Core Debug Register
  • CPUID
  • Core peripherals
  • Digital-to-Analog Converter
  • Debug Control Block
  • Direct Memory Access Controller
  • Device Service Unit
  • Data Watchpoint and Trace unit
  • External Interrupt Controller
  • Embedded Trace Macrocell
  • Event System Interface
  • Flash Patch and Breakpoint unit
  • Floating Point Unit
  • Frequency Meter
  • Generic Clock Generator
  • Ethernet MAC
  • HSB Matrix
  • Inter-IC Sound Interface
  • Integrity Check Monitor
  • Instrumentation Trace Macrocell
  • Main Clock
  • Memory Protection Unit
  • Nested Vector Interrupt Controller
  • Non-Volatile Memory Controller
  • 32kHz Oscillators Control
  • Oscillators Control
  • Peripheral Access Controller
  • Parallel Capture Controller
  • Quadrature Decodeur
  • Power Manager
  • Port Module
  • All the peripherals.
  • Quad SPI interface
  • RAM ECC
  • Reset Controller
  • Real-Time Counter
  • System Control Block
  • SD/MMC Host Controller
  • Serial Communication Interface
  • Serial Communication Interface
  • Serial Communication Interface
  • Serial Communication Interface
  • Serial Communication Interface
  • Serial Communication Interface
  • Supply Controller
  • SysTick: System Timer
  • System Control Registers
  • System timer
  • Basic Timer Counter
  • Basic Timer Counter
  • Basic Timer Counter
  • Basic Timer Counter
  • Basic Timer Counter
  • Basic Timer Counter
  • Timer Counter Control
  • Timer Counter Control
  • Timer Counter Control
  • Timer Counter Control
  • Timer Counter Control
  • Trace Port Interface Register
  • Trace Port Interface Unit
  • True Random Generator
  • Universal Serial Bus
  • Watchdog Timer

Enums§

Constants§