Module atsame51j18a_pac::gclk::genctrl [−][src]
Generic Clock Generator Control
Structs
DIVSEL_W | Write proxy for field |
DIV_W | Write proxy for field |
GENEN_W | Write proxy for field |
IDC_W | Write proxy for field |
OE_W | Write proxy for field |
OOV_W | Write proxy for field |
RUNSTDBY_W | Write proxy for field |
SRC_W | Write proxy for field |
Enums
DIVSEL_A | Divide Selection |
SRC_A | Source Select |
Type Definitions
DIVSEL_R | Reader of field |
DIV_R | Reader of field |
GENEN_R | Reader of field |
IDC_R | Reader of field |
OE_R | Reader of field |
OOV_R | Reader of field |
R | Reader of register GENCTRL[%s] |
RUNSTDBY_R | Reader of field |
SRC_R | Reader of field |
W | Writer for register GENCTRL[%s] |