#[doc = "Reader of register CTRLA"]
pub type R = crate::R<u16, super::CTRLA>;
#[doc = "Writer for register CTRLA"]
pub type W = crate::W<u16, super::CTRLA>;
#[doc = "Register CTRLA `reset()`'s with value 0"]
impl crate::ResetValue for super::CTRLA {
type Type = u16;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Write proxy for field `SWRST`"]
pub struct SWRST_W<'a> {
w: &'a mut W,
}
impl<'a> SWRST_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u16) & 0x01);
self.w
}
}
#[doc = "Reader of field `ENABLE`"]
pub type ENABLE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `ENABLE`"]
pub struct ENABLE_W<'a> {
w: &'a mut W,
}
impl<'a> ENABLE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u16) & 0x01) << 1);
self.w
}
}
#[doc = "TC Mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MODE_A {
#[doc = "0: Counter in 16-bit mode"]
COUNT16,
#[doc = "1: Counter in 8-bit mode"]
COUNT8,
#[doc = "2: Counter in 32-bit mode"]
COUNT32,
}
impl From<MODE_A> for u8 {
#[inline(always)]
fn from(variant: MODE_A) -> Self {
match variant {
MODE_A::COUNT16 => 0,
MODE_A::COUNT8 => 1,
MODE_A::COUNT32 => 2,
}
}
}
#[doc = "Reader of field `MODE`"]
pub type MODE_R = crate::R<u8, MODE_A>;
impl MODE_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<u8, MODE_A> {
use crate::Variant::*;
match self.bits {
0 => Val(MODE_A::COUNT16),
1 => Val(MODE_A::COUNT8),
2 => Val(MODE_A::COUNT32),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `COUNT16`"]
#[inline(always)]
pub fn is_count16(&self) -> bool {
*self == MODE_A::COUNT16
}
#[doc = "Checks if the value of the field is `COUNT8`"]
#[inline(always)]
pub fn is_count8(&self) -> bool {
*self == MODE_A::COUNT8
}
#[doc = "Checks if the value of the field is `COUNT32`"]
#[inline(always)]
pub fn is_count32(&self) -> bool {
*self == MODE_A::COUNT32
}
}
#[doc = "Write proxy for field `MODE`"]
pub struct MODE_W<'a> {
w: &'a mut W,
}
impl<'a> MODE_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: MODE_A) -> &'a mut W {
unsafe { self.bits(variant.into()) }
}
#[doc = "Counter in 16-bit mode"]
#[inline(always)]
pub fn count16(self) -> &'a mut W {
self.variant(MODE_A::COUNT16)
}
#[doc = "Counter in 8-bit mode"]
#[inline(always)]
pub fn count8(self) -> &'a mut W {
self.variant(MODE_A::COUNT8)
}
#[doc = "Counter in 32-bit mode"]
#[inline(always)]
pub fn count32(self) -> &'a mut W {
self.variant(MODE_A::COUNT32)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u16) & 0x03) << 2);
self.w
}
}
#[doc = "Waveform Generation Operation\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WAVEGEN_A {
#[doc = "0: `0`"]
NFRQ,
#[doc = "1: `1`"]
MFRQ,
#[doc = "2: `10`"]
NPWM,
#[doc = "3: `11`"]
MPWM,
}
impl From<WAVEGEN_A> for u8 {
#[inline(always)]
fn from(variant: WAVEGEN_A) -> Self {
match variant {
WAVEGEN_A::NFRQ => 0,
WAVEGEN_A::MFRQ => 1,
WAVEGEN_A::NPWM => 2,
WAVEGEN_A::MPWM => 3,
}
}
}
#[doc = "Reader of field `WAVEGEN`"]
pub type WAVEGEN_R = crate::R<u8, WAVEGEN_A>;
impl WAVEGEN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> WAVEGEN_A {
match self.bits {
0 => WAVEGEN_A::NFRQ,
1 => WAVEGEN_A::MFRQ,
2 => WAVEGEN_A::NPWM,
3 => WAVEGEN_A::MPWM,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `NFRQ`"]
#[inline(always)]
pub fn is_nfrq(&self) -> bool {
*self == WAVEGEN_A::NFRQ
}
#[doc = "Checks if the value of the field is `MFRQ`"]
#[inline(always)]
pub fn is_mfrq(&self) -> bool {
*self == WAVEGEN_A::MFRQ
}
#[doc = "Checks if the value of the field is `NPWM`"]
#[inline(always)]
pub fn is_npwm(&self) -> bool {
*self == WAVEGEN_A::NPWM
}
#[doc = "Checks if the value of the field is `MPWM`"]
#[inline(always)]
pub fn is_mpwm(&self) -> bool {
*self == WAVEGEN_A::MPWM
}
}
#[doc = "Write proxy for field `WAVEGEN`"]
pub struct WAVEGEN_W<'a> {
w: &'a mut W,
}
impl<'a> WAVEGEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: WAVEGEN_A) -> &'a mut W {
{
self.bits(variant.into())
}
}
#[doc = "`0`"]
#[inline(always)]
pub fn nfrq(self) -> &'a mut W {
self.variant(WAVEGEN_A::NFRQ)
}
#[doc = "`1`"]
#[inline(always)]
pub fn mfrq(self) -> &'a mut W {
self.variant(WAVEGEN_A::MFRQ)
}
#[doc = "`10`"]
#[inline(always)]
pub fn npwm(self) -> &'a mut W {
self.variant(WAVEGEN_A::NPWM)
}
#[doc = "`11`"]
#[inline(always)]
pub fn mpwm(self) -> &'a mut W {
self.variant(WAVEGEN_A::MPWM)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 5)) | (((value as u16) & 0x03) << 5);
self.w
}
}
#[doc = "Prescaler\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PRESCALER_A {
#[doc = "0: Prescaler: GCLK_TC"]
DIV1,
#[doc = "1: Prescaler: GCLK_TC/2"]
DIV2,
#[doc = "2: Prescaler: GCLK_TC/4"]
DIV4,
#[doc = "3: Prescaler: GCLK_TC/8"]
DIV8,
#[doc = "4: Prescaler: GCLK_TC/16"]
DIV16,
#[doc = "5: Prescaler: GCLK_TC/64"]
DIV64,
#[doc = "6: Prescaler: GCLK_TC/256"]
DIV256,
#[doc = "7: Prescaler: GCLK_TC/1024"]
DIV1024,
}
impl From<PRESCALER_A> for u8 {
#[inline(always)]
fn from(variant: PRESCALER_A) -> Self {
match variant {
PRESCALER_A::DIV1 => 0,
PRESCALER_A::DIV2 => 1,
PRESCALER_A::DIV4 => 2,
PRESCALER_A::DIV8 => 3,
PRESCALER_A::DIV16 => 4,
PRESCALER_A::DIV64 => 5,
PRESCALER_A::DIV256 => 6,
PRESCALER_A::DIV1024 => 7,
}
}
}
#[doc = "Reader of field `PRESCALER`"]
pub type PRESCALER_R = crate::R<u8, PRESCALER_A>;
impl PRESCALER_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> PRESCALER_A {
match self.bits {
0 => PRESCALER_A::DIV1,
1 => PRESCALER_A::DIV2,
2 => PRESCALER_A::DIV4,
3 => PRESCALER_A::DIV8,
4 => PRESCALER_A::DIV16,
5 => PRESCALER_A::DIV64,
6 => PRESCALER_A::DIV256,
7 => PRESCALER_A::DIV1024,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `DIV1`"]
#[inline(always)]
pub fn is_div1(&self) -> bool {
*self == PRESCALER_A::DIV1
}
#[doc = "Checks if the value of the field is `DIV2`"]
#[inline(always)]
pub fn is_div2(&self) -> bool {
*self == PRESCALER_A::DIV2
}
#[doc = "Checks if the value of the field is `DIV4`"]
#[inline(always)]
pub fn is_div4(&self) -> bool {
*self == PRESCALER_A::DIV4
}
#[doc = "Checks if the value of the field is `DIV8`"]
#[inline(always)]
pub fn is_div8(&self) -> bool {
*self == PRESCALER_A::DIV8
}
#[doc = "Checks if the value of the field is `DIV16`"]
#[inline(always)]
pub fn is_div16(&self) -> bool {
*self == PRESCALER_A::DIV16
}
#[doc = "Checks if the value of the field is `DIV64`"]
#[inline(always)]
pub fn is_div64(&self) -> bool {
*self == PRESCALER_A::DIV64
}
#[doc = "Checks if the value of the field is `DIV256`"]
#[inline(always)]
pub fn is_div256(&self) -> bool {
*self == PRESCALER_A::DIV256
}
#[doc = "Checks if the value of the field is `DIV1024`"]
#[inline(always)]
pub fn is_div1024(&self) -> bool {
*self == PRESCALER_A::DIV1024
}
}
#[doc = "Write proxy for field `PRESCALER`"]
pub struct PRESCALER_W<'a> {
w: &'a mut W,
}
impl<'a> PRESCALER_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: PRESCALER_A) -> &'a mut W {
{
self.bits(variant.into())
}
}
#[doc = "Prescaler: GCLK_TC"]
#[inline(always)]
pub fn div1(self) -> &'a mut W {
self.variant(PRESCALER_A::DIV1)
}
#[doc = "Prescaler: GCLK_TC/2"]
#[inline(always)]
pub fn div2(self) -> &'a mut W {
self.variant(PRESCALER_A::DIV2)
}
#[doc = "Prescaler: GCLK_TC/4"]
#[inline(always)]
pub fn div4(self) -> &'a mut W {
self.variant(PRESCALER_A::DIV4)
}
#[doc = "Prescaler: GCLK_TC/8"]
#[inline(always)]
pub fn div8(self) -> &'a mut W {
self.variant(PRESCALER_A::DIV8)
}
#[doc = "Prescaler: GCLK_TC/16"]
#[inline(always)]
pub fn div16(self) -> &'a mut W {
self.variant(PRESCALER_A::DIV16)
}
#[doc = "Prescaler: GCLK_TC/64"]
#[inline(always)]
pub fn div64(self) -> &'a mut W {
self.variant(PRESCALER_A::DIV64)
}
#[doc = "Prescaler: GCLK_TC/256"]
#[inline(always)]
pub fn div256(self) -> &'a mut W {
self.variant(PRESCALER_A::DIV256)
}
#[doc = "Prescaler: GCLK_TC/1024"]
#[inline(always)]
pub fn div1024(self) -> &'a mut W {
self.variant(PRESCALER_A::DIV1024)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x07 << 8)) | (((value as u16) & 0x07) << 8);
self.w
}
}
#[doc = "Reader of field `RUNSTDBY`"]
pub type RUNSTDBY_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RUNSTDBY`"]
pub struct RUNSTDBY_W<'a> {
w: &'a mut W,
}
impl<'a> RUNSTDBY_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u16) & 0x01) << 11);
self.w
}
}
#[doc = "Prescaler and Counter Synchronization\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PRESCSYNC_A {
#[doc = "0: Reload or reset the counter on next generic clock"]
GCLK,
#[doc = "1: Reload or reset the counter on next prescaler clock"]
PRESC,
#[doc = "2: Reload or reset the counter on next generic clock. Reset the prescaler counter"]
RESYNC,
}
impl From<PRESCSYNC_A> for u8 {
#[inline(always)]
fn from(variant: PRESCSYNC_A) -> Self {
match variant {
PRESCSYNC_A::GCLK => 0,
PRESCSYNC_A::PRESC => 1,
PRESCSYNC_A::RESYNC => 2,
}
}
}
#[doc = "Reader of field `PRESCSYNC`"]
pub type PRESCSYNC_R = crate::R<u8, PRESCSYNC_A>;
impl PRESCSYNC_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<u8, PRESCSYNC_A> {
use crate::Variant::*;
match self.bits {
0 => Val(PRESCSYNC_A::GCLK),
1 => Val(PRESCSYNC_A::PRESC),
2 => Val(PRESCSYNC_A::RESYNC),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `GCLK`"]
#[inline(always)]
pub fn is_gclk(&self) -> bool {
*self == PRESCSYNC_A::GCLK
}
#[doc = "Checks if the value of the field is `PRESC`"]
#[inline(always)]
pub fn is_presc(&self) -> bool {
*self == PRESCSYNC_A::PRESC
}
#[doc = "Checks if the value of the field is `RESYNC`"]
#[inline(always)]
pub fn is_resync(&self) -> bool {
*self == PRESCSYNC_A::RESYNC
}
}
#[doc = "Write proxy for field `PRESCSYNC`"]
pub struct PRESCSYNC_W<'a> {
w: &'a mut W,
}
impl<'a> PRESCSYNC_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: PRESCSYNC_A) -> &'a mut W {
unsafe { self.bits(variant.into()) }
}
#[doc = "Reload or reset the counter on next generic clock"]
#[inline(always)]
pub fn gclk(self) -> &'a mut W {
self.variant(PRESCSYNC_A::GCLK)
}
#[doc = "Reload or reset the counter on next prescaler clock"]
#[inline(always)]
pub fn presc(self) -> &'a mut W {
self.variant(PRESCSYNC_A::PRESC)
}
#[doc = "Reload or reset the counter on next generic clock. Reset the prescaler counter"]
#[inline(always)]
pub fn resync(self) -> &'a mut W {
self.variant(PRESCSYNC_A::RESYNC)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u16) & 0x03) << 12);
self.w
}
}
impl R {
#[doc = "Bit 1 - Enable"]
#[inline(always)]
pub fn enable(&self) -> ENABLE_R {
ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bits 2:3 - TC Mode"]
#[inline(always)]
pub fn mode(&self) -> MODE_R {
MODE_R::new(((self.bits >> 2) & 0x03) as u8)
}
#[doc = "Bits 5:6 - Waveform Generation Operation"]
#[inline(always)]
pub fn wavegen(&self) -> WAVEGEN_R {
WAVEGEN_R::new(((self.bits >> 5) & 0x03) as u8)
}
#[doc = "Bits 8:10 - Prescaler"]
#[inline(always)]
pub fn prescaler(&self) -> PRESCALER_R {
PRESCALER_R::new(((self.bits >> 8) & 0x07) as u8)
}
#[doc = "Bit 11 - Run in Standby"]
#[inline(always)]
pub fn runstdby(&self) -> RUNSTDBY_R {
RUNSTDBY_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bits 12:13 - Prescaler and Counter Synchronization"]
#[inline(always)]
pub fn prescsync(&self) -> PRESCSYNC_R {
PRESCSYNC_R::new(((self.bits >> 12) & 0x03) as u8)
}
}
impl W {
#[doc = "Bit 0 - Software Reset"]
#[inline(always)]
pub fn swrst(&mut self) -> SWRST_W {
SWRST_W { w: self }
}
#[doc = "Bit 1 - Enable"]
#[inline(always)]
pub fn enable(&mut self) -> ENABLE_W {
ENABLE_W { w: self }
}
#[doc = "Bits 2:3 - TC Mode"]
#[inline(always)]
pub fn mode(&mut self) -> MODE_W {
MODE_W { w: self }
}
#[doc = "Bits 5:6 - Waveform Generation Operation"]
#[inline(always)]
pub fn wavegen(&mut self) -> WAVEGEN_W {
WAVEGEN_W { w: self }
}
#[doc = "Bits 8:10 - Prescaler"]
#[inline(always)]
pub fn prescaler(&mut self) -> PRESCALER_W {
PRESCALER_W { w: self }
}
#[doc = "Bit 11 - Run in Standby"]
#[inline(always)]
pub fn runstdby(&mut self) -> RUNSTDBY_W {
RUNSTDBY_W { w: self }
}
#[doc = "Bits 12:13 - Prescaler and Counter Synchronization"]
#[inline(always)]
pub fn prescsync(&mut self) -> PRESCSYNC_W {
PRESCSYNC_W { w: self }
}
}