Expand description
Cortex-M0+ Micro-Trace Buffer
Modules§
- MTB Authentication Status
- MTB Base
- CoreSight
- CoreSight
- CoreSight
- CoreSight
- MTB Claim Clear
- MTB Claim Set
- MTB Device Architecture
- MTB Device Configuration
- MTB Device Type
- MTB Flow
- MTB Integration Mode Control
- MTB Lock Access
- MTB Lock Status
- MTB Master
- CoreSight
- CoreSight
- CoreSight
- CoreSight
- CoreSight
- CoreSight
- CoreSight
- CoreSight
- MTB Position
Structs§
- Register block
Type Aliases§
- AUTHSTATUS (r) register accessor: MTB Authentication Status
- BASE (r) register accessor: MTB Base
- CID0 (r) register accessor: CoreSight
- CID1 (r) register accessor: CoreSight
- CID2 (r) register accessor: CoreSight
- CID3 (r) register accessor: CoreSight
- CLAIMCLR (rw) register accessor: MTB Claim Clear
- CLAIMSET (rw) register accessor: MTB Claim Set
- DEVARCH (r) register accessor: MTB Device Architecture
- DEVID (r) register accessor: MTB Device Configuration
- DEVTYPE (r) register accessor: MTB Device Type
- FLOW (rw) register accessor: MTB Flow
- ITCTRL (rw) register accessor: MTB Integration Mode Control
- LOCKACCESS (rw) register accessor: MTB Lock Access
- LOCKSTATUS (r) register accessor: MTB Lock Status
- MASTER (rw) register accessor: MTB Master
- PID0 (r) register accessor: CoreSight
- PID1 (r) register accessor: CoreSight
- PID2 (r) register accessor: CoreSight
- PID3 (r) register accessor: CoreSight
- PID4 (r) register accessor: CoreSight
- PID5 (r) register accessor: CoreSight
- PID6 (r) register accessor: CoreSight
- PID7 (r) register accessor: CoreSight
- POSITION (rw) register accessor: MTB Position