Module atsam4sd16b_pac::pwm::clk[][src]

Expand description

PWM Clock Register

Structs

PWM Clock Register

Field DIVA reader - CLKA, CLKB Divide Factor

Field DIVA writer - CLKA, CLKB Divide Factor

Field DIVB reader - CLKA, CLKB Divide Factor

Field DIVB writer - CLKA, CLKB Divide Factor

Field PREA reader - CLKA, CLKB Source Clock Selection

Field PREA writer - CLKA, CLKB Source Clock Selection

Field PREB reader - CLKA, CLKB Source Clock Selection

Field PREB writer - CLKA, CLKB Source Clock Selection

Register CLK reader

Register CLK writer