Module atsam4ls8a_pac::twim0

Two-wire Master Interface 0

Modules

cmdr

Command Register

cr

Control Register

cwgr

Clock Waveform Generator Register

hscwgr

HS-mode Clock Waveform Generator

hssrr

HS-mode Slew Rate Register

idr

Interrupt Disable Register

ier

Interrupt Enable Register

imr

Interrupt Mask Register

ncmdr

Next Command Register

pr

Parameter Register

rhr

Receive Holding Register

scr

Status Clear Register

smbtr

SMBus Timing Register

sr

Status Register

srr

Slew Rate Register

thr

Transmit Holding Register

vr

Version Register

Structs

RegisterBlock

Register block

Type Definitions

CMDR

CMDR register accessor: an alias for Reg<CMDR_SPEC>

CR

CR register accessor: an alias for Reg<CR_SPEC>

CWGR

CWGR register accessor: an alias for Reg<CWGR_SPEC>

HSCWGR

HSCWGR register accessor: an alias for Reg<HSCWGR_SPEC>

HSSRR

HSSRR register accessor: an alias for Reg<HSSRR_SPEC>

IDR

IDR register accessor: an alias for Reg<IDR_SPEC>

IER

IER register accessor: an alias for Reg<IER_SPEC>

IMR

IMR register accessor: an alias for Reg<IMR_SPEC>

NCMDR

NCMDR register accessor: an alias for Reg<NCMDR_SPEC>

PR

PR register accessor: an alias for Reg<PR_SPEC>

RHR

RHR register accessor: an alias for Reg<RHR_SPEC>

SCR

SCR register accessor: an alias for Reg<SCR_SPEC>

SMBTR

SMBTR register accessor: an alias for Reg<SMBTR_SPEC>

SR

SR register accessor: an alias for Reg<SR_SPEC>

SRR

SRR register accessor: an alias for Reg<SRR_SPEC>

THR

THR register accessor: an alias for Reg<THR_SPEC>

VR

VR register accessor: an alias for Reg<VR_SPEC>