Module atsam4ls4c_pac::twim0 [−][src]
Two-wire Master Interface 0
Modules
cmdr | Command Register |
cr | Control Register |
cwgr | Clock Waveform Generator Register |
hscwgr | HS-mode Clock Waveform Generator |
hssrr | HS-mode Slew Rate Register |
idr | Interrupt Disable Register |
ier | Interrupt Enable Register |
imr | Interrupt Mask Register |
ncmdr | Next Command Register |
pr | Parameter Register |
rhr | Receive Holding Register |
scr | Status Clear Register |
smbtr | SMBus Timing Register |
sr | Status Register |
srr | Slew Rate Register |
thr | Transmit Holding Register |
vr | Version Register |
Structs
RegisterBlock | Register block |
Type Definitions
CMDR | Command Register |
CR | Control Register |
CWGR | Clock Waveform Generator Register |
HSCWGR | HS-mode Clock Waveform Generator |
HSSRR | HS-mode Slew Rate Register |
IDR | Interrupt Disable Register |
IER | Interrupt Enable Register |
IMR | Interrupt Mask Register |
NCMDR | Next Command Register |
PR | Parameter Register |
RHR | Receive Holding Register |
SCR | Status Clear Register |
SMBTR | SMBus Timing Register |
SR | Status Register |
SRR | Slew Rate Register |
THR | Transmit Holding Register |
VR | Version Register |