atsam4ls2b_pac/usart0/
man.rs

1#[doc = "Register `MAN` reader"]
2pub struct R(crate::R<MAN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MAN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MAN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MAN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `MAN` writer"]
17pub struct W(crate::W<MAN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<MAN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<MAN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<MAN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TX_PL` reader - Transmitter Preamble Length"]
38pub type TX_PL_R = crate::FieldReader<u8, TX_PLSELECT_A>;
39#[doc = "Transmitter Preamble Length\n\nValue on reset: 4"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum TX_PLSELECT_A {
43    #[doc = "0: The Transmitter Preamble pattern generation is disabled"]
44    _0 = 0,
45}
46impl From<TX_PLSELECT_A> for u8 {
47    #[inline(always)]
48    fn from(variant: TX_PLSELECT_A) -> Self {
49        variant as _
50    }
51}
52impl TX_PL_R {
53    #[doc = "Get enumerated values variant"]
54    #[inline(always)]
55    pub fn variant(&self) -> Option<TX_PLSELECT_A> {
56        match self.bits {
57            0 => Some(TX_PLSELECT_A::_0),
58            _ => None,
59        }
60    }
61    #[doc = "Checks if the value of the field is `_0`"]
62    #[inline(always)]
63    pub fn is_0(&self) -> bool {
64        *self == TX_PLSELECT_A::_0
65    }
66}
67#[doc = "Field `TX_PL` writer - Transmitter Preamble Length"]
68pub type TX_PL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MAN_SPEC, u8, TX_PLSELECT_A, 4, O>;
69impl<'a, const O: u8> TX_PL_W<'a, O> {
70    #[doc = "The Transmitter Preamble pattern generation is disabled"]
71    #[inline(always)]
72    pub fn _0(self) -> &'a mut W {
73        self.variant(TX_PLSELECT_A::_0)
74    }
75}
76#[doc = "Field `TX_PP` reader - Transmitter Preamble Pattern"]
77pub type TX_PP_R = crate::FieldReader<u8, TX_PPSELECT_A>;
78#[doc = "Transmitter Preamble Pattern\n\nValue on reset: 0"]
79#[derive(Clone, Copy, Debug, PartialEq, Eq)]
80#[repr(u8)]
81pub enum TX_PPSELECT_A {
82    #[doc = "0: ALL_ONE"]
83    _0 = 0,
84    #[doc = "1: ALL_ZERO"]
85    _1 = 1,
86    #[doc = "2: ZERO_ONE"]
87    _2 = 2,
88    #[doc = "3: ONE_ZERO"]
89    _3 = 3,
90}
91impl From<TX_PPSELECT_A> for u8 {
92    #[inline(always)]
93    fn from(variant: TX_PPSELECT_A) -> Self {
94        variant as _
95    }
96}
97impl TX_PP_R {
98    #[doc = "Get enumerated values variant"]
99    #[inline(always)]
100    pub fn variant(&self) -> TX_PPSELECT_A {
101        match self.bits {
102            0 => TX_PPSELECT_A::_0,
103            1 => TX_PPSELECT_A::_1,
104            2 => TX_PPSELECT_A::_2,
105            3 => TX_PPSELECT_A::_3,
106            _ => unreachable!(),
107        }
108    }
109    #[doc = "Checks if the value of the field is `_0`"]
110    #[inline(always)]
111    pub fn is_0(&self) -> bool {
112        *self == TX_PPSELECT_A::_0
113    }
114    #[doc = "Checks if the value of the field is `_1`"]
115    #[inline(always)]
116    pub fn is_1(&self) -> bool {
117        *self == TX_PPSELECT_A::_1
118    }
119    #[doc = "Checks if the value of the field is `_2`"]
120    #[inline(always)]
121    pub fn is_2(&self) -> bool {
122        *self == TX_PPSELECT_A::_2
123    }
124    #[doc = "Checks if the value of the field is `_3`"]
125    #[inline(always)]
126    pub fn is_3(&self) -> bool {
127        *self == TX_PPSELECT_A::_3
128    }
129}
130#[doc = "Field `TX_PP` writer - Transmitter Preamble Pattern"]
131pub type TX_PP_W<'a, const O: u8> =
132    crate::FieldWriterSafe<'a, u32, MAN_SPEC, u8, TX_PPSELECT_A, 2, O>;
133impl<'a, const O: u8> TX_PP_W<'a, O> {
134    #[doc = "ALL_ONE"]
135    #[inline(always)]
136    pub fn _0(self) -> &'a mut W {
137        self.variant(TX_PPSELECT_A::_0)
138    }
139    #[doc = "ALL_ZERO"]
140    #[inline(always)]
141    pub fn _1(self) -> &'a mut W {
142        self.variant(TX_PPSELECT_A::_1)
143    }
144    #[doc = "ZERO_ONE"]
145    #[inline(always)]
146    pub fn _2(self) -> &'a mut W {
147        self.variant(TX_PPSELECT_A::_2)
148    }
149    #[doc = "ONE_ZERO"]
150    #[inline(always)]
151    pub fn _3(self) -> &'a mut W {
152        self.variant(TX_PPSELECT_A::_3)
153    }
154}
155#[doc = "Field `TX_MPOL` reader - Transmitter Manchester Polarity"]
156pub type TX_MPOL_R = crate::BitReader<TX_MPOLSELECT_A>;
157#[doc = "Transmitter Manchester Polarity\n\nValue on reset: 1"]
158#[derive(Clone, Copy, Debug, PartialEq, Eq)]
159pub enum TX_MPOLSELECT_A {
160    #[doc = "0: Logic Zero is coded as a zero-to-one transition, Logic One is coded as a one-to-zero transition"]
161    _0 = 0,
162    #[doc = "1: Logic Zero is coded as a one-to-zero transition, Logic One is coded as a zero-to-one transition"]
163    _1 = 1,
164}
165impl From<TX_MPOLSELECT_A> for bool {
166    #[inline(always)]
167    fn from(variant: TX_MPOLSELECT_A) -> Self {
168        variant as u8 != 0
169    }
170}
171impl TX_MPOL_R {
172    #[doc = "Get enumerated values variant"]
173    #[inline(always)]
174    pub fn variant(&self) -> TX_MPOLSELECT_A {
175        match self.bits {
176            false => TX_MPOLSELECT_A::_0,
177            true => TX_MPOLSELECT_A::_1,
178        }
179    }
180    #[doc = "Checks if the value of the field is `_0`"]
181    #[inline(always)]
182    pub fn is_0(&self) -> bool {
183        *self == TX_MPOLSELECT_A::_0
184    }
185    #[doc = "Checks if the value of the field is `_1`"]
186    #[inline(always)]
187    pub fn is_1(&self) -> bool {
188        *self == TX_MPOLSELECT_A::_1
189    }
190}
191#[doc = "Field `TX_MPOL` writer - Transmitter Manchester Polarity"]
192pub type TX_MPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, MAN_SPEC, TX_MPOLSELECT_A, O>;
193impl<'a, const O: u8> TX_MPOL_W<'a, O> {
194    #[doc = "Logic Zero is coded as a zero-to-one transition, Logic One is coded as a one-to-zero transition"]
195    #[inline(always)]
196    pub fn _0(self) -> &'a mut W {
197        self.variant(TX_MPOLSELECT_A::_0)
198    }
199    #[doc = "Logic Zero is coded as a one-to-zero transition, Logic One is coded as a zero-to-one transition"]
200    #[inline(always)]
201    pub fn _1(self) -> &'a mut W {
202        self.variant(TX_MPOLSELECT_A::_1)
203    }
204}
205#[doc = "Field `RX_PL` reader - Receiver Preamble Length"]
206pub type RX_PL_R = crate::FieldReader<u8, RX_PLSELECT_A>;
207#[doc = "Receiver Preamble Length\n\nValue on reset: 1"]
208#[derive(Clone, Copy, Debug, PartialEq, Eq)]
209#[repr(u8)]
210pub enum RX_PLSELECT_A {
211    #[doc = "0: The receiver preamble pattern detection is disabled"]
212    _0 = 0,
213}
214impl From<RX_PLSELECT_A> for u8 {
215    #[inline(always)]
216    fn from(variant: RX_PLSELECT_A) -> Self {
217        variant as _
218    }
219}
220impl RX_PL_R {
221    #[doc = "Get enumerated values variant"]
222    #[inline(always)]
223    pub fn variant(&self) -> Option<RX_PLSELECT_A> {
224        match self.bits {
225            0 => Some(RX_PLSELECT_A::_0),
226            _ => None,
227        }
228    }
229    #[doc = "Checks if the value of the field is `_0`"]
230    #[inline(always)]
231    pub fn is_0(&self) -> bool {
232        *self == RX_PLSELECT_A::_0
233    }
234}
235#[doc = "Field `RX_PL` writer - Receiver Preamble Length"]
236pub type RX_PL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MAN_SPEC, u8, RX_PLSELECT_A, 4, O>;
237impl<'a, const O: u8> RX_PL_W<'a, O> {
238    #[doc = "The receiver preamble pattern detection is disabled"]
239    #[inline(always)]
240    pub fn _0(self) -> &'a mut W {
241        self.variant(RX_PLSELECT_A::_0)
242    }
243}
244#[doc = "Field `RX_PP` reader - Receiver Preamble Pattern detected"]
245pub type RX_PP_R = crate::FieldReader<u8, RX_PPSELECT_A>;
246#[doc = "Receiver Preamble Pattern detected\n\nValue on reset: 0"]
247#[derive(Clone, Copy, Debug, PartialEq, Eq)]
248#[repr(u8)]
249pub enum RX_PPSELECT_A {
250    #[doc = "0: ALL_ONE"]
251    _0 = 0,
252    #[doc = "1: ALL_ZERO"]
253    _1 = 1,
254    #[doc = "2: ZERO_ONE"]
255    _2 = 2,
256    #[doc = "3: ONE_ZERO"]
257    _3 = 3,
258}
259impl From<RX_PPSELECT_A> for u8 {
260    #[inline(always)]
261    fn from(variant: RX_PPSELECT_A) -> Self {
262        variant as _
263    }
264}
265impl RX_PP_R {
266    #[doc = "Get enumerated values variant"]
267    #[inline(always)]
268    pub fn variant(&self) -> RX_PPSELECT_A {
269        match self.bits {
270            0 => RX_PPSELECT_A::_0,
271            1 => RX_PPSELECT_A::_1,
272            2 => RX_PPSELECT_A::_2,
273            3 => RX_PPSELECT_A::_3,
274            _ => unreachable!(),
275        }
276    }
277    #[doc = "Checks if the value of the field is `_0`"]
278    #[inline(always)]
279    pub fn is_0(&self) -> bool {
280        *self == RX_PPSELECT_A::_0
281    }
282    #[doc = "Checks if the value of the field is `_1`"]
283    #[inline(always)]
284    pub fn is_1(&self) -> bool {
285        *self == RX_PPSELECT_A::_1
286    }
287    #[doc = "Checks if the value of the field is `_2`"]
288    #[inline(always)]
289    pub fn is_2(&self) -> bool {
290        *self == RX_PPSELECT_A::_2
291    }
292    #[doc = "Checks if the value of the field is `_3`"]
293    #[inline(always)]
294    pub fn is_3(&self) -> bool {
295        *self == RX_PPSELECT_A::_3
296    }
297}
298#[doc = "Field `RX_PP` writer - Receiver Preamble Pattern detected"]
299pub type RX_PP_W<'a, const O: u8> =
300    crate::FieldWriterSafe<'a, u32, MAN_SPEC, u8, RX_PPSELECT_A, 2, O>;
301impl<'a, const O: u8> RX_PP_W<'a, O> {
302    #[doc = "ALL_ONE"]
303    #[inline(always)]
304    pub fn _0(self) -> &'a mut W {
305        self.variant(RX_PPSELECT_A::_0)
306    }
307    #[doc = "ALL_ZERO"]
308    #[inline(always)]
309    pub fn _1(self) -> &'a mut W {
310        self.variant(RX_PPSELECT_A::_1)
311    }
312    #[doc = "ZERO_ONE"]
313    #[inline(always)]
314    pub fn _2(self) -> &'a mut W {
315        self.variant(RX_PPSELECT_A::_2)
316    }
317    #[doc = "ONE_ZERO"]
318    #[inline(always)]
319    pub fn _3(self) -> &'a mut W {
320        self.variant(RX_PPSELECT_A::_3)
321    }
322}
323#[doc = "Field `RX_MPOL` reader - Receiver Manchester Polarity"]
324pub type RX_MPOL_R = crate::BitReader<RX_MPOLSELECT_A>;
325#[doc = "Receiver Manchester Polarity\n\nValue on reset: 1"]
326#[derive(Clone, Copy, Debug, PartialEq, Eq)]
327pub enum RX_MPOLSELECT_A {
328    #[doc = "0: Logic Zero is coded as a zero-to-one transition, Logic One is coded as a one-to-zero transition"]
329    _0 = 0,
330    #[doc = "1: Logic Zero is coded as a one-to-zero transition, Logic One is coded as a zero-to-one transition"]
331    _1 = 1,
332}
333impl From<RX_MPOLSELECT_A> for bool {
334    #[inline(always)]
335    fn from(variant: RX_MPOLSELECT_A) -> Self {
336        variant as u8 != 0
337    }
338}
339impl RX_MPOL_R {
340    #[doc = "Get enumerated values variant"]
341    #[inline(always)]
342    pub fn variant(&self) -> RX_MPOLSELECT_A {
343        match self.bits {
344            false => RX_MPOLSELECT_A::_0,
345            true => RX_MPOLSELECT_A::_1,
346        }
347    }
348    #[doc = "Checks if the value of the field is `_0`"]
349    #[inline(always)]
350    pub fn is_0(&self) -> bool {
351        *self == RX_MPOLSELECT_A::_0
352    }
353    #[doc = "Checks if the value of the field is `_1`"]
354    #[inline(always)]
355    pub fn is_1(&self) -> bool {
356        *self == RX_MPOLSELECT_A::_1
357    }
358}
359#[doc = "Field `RX_MPOL` writer - Receiver Manchester Polarity"]
360pub type RX_MPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, MAN_SPEC, RX_MPOLSELECT_A, O>;
361impl<'a, const O: u8> RX_MPOL_W<'a, O> {
362    #[doc = "Logic Zero is coded as a zero-to-one transition, Logic One is coded as a one-to-zero transition"]
363    #[inline(always)]
364    pub fn _0(self) -> &'a mut W {
365        self.variant(RX_MPOLSELECT_A::_0)
366    }
367    #[doc = "Logic Zero is coded as a one-to-zero transition, Logic One is coded as a zero-to-one transition"]
368    #[inline(always)]
369    pub fn _1(self) -> &'a mut W {
370        self.variant(RX_MPOLSELECT_A::_1)
371    }
372}
373#[doc = "Field `DRIFT` reader - Drift compensation"]
374pub type DRIFT_R = crate::BitReader<DRIFTSELECT_A>;
375#[doc = "Drift compensation\n\nValue on reset: 0"]
376#[derive(Clone, Copy, Debug, PartialEq, Eq)]
377pub enum DRIFTSELECT_A {
378    #[doc = "0: The USART can not recover from an important clock drift"]
379    _0 = 0,
380    #[doc = "1: The USART can recover from clock drift. The 16X clock mode must be enabled"]
381    _1 = 1,
382}
383impl From<DRIFTSELECT_A> for bool {
384    #[inline(always)]
385    fn from(variant: DRIFTSELECT_A) -> Self {
386        variant as u8 != 0
387    }
388}
389impl DRIFT_R {
390    #[doc = "Get enumerated values variant"]
391    #[inline(always)]
392    pub fn variant(&self) -> DRIFTSELECT_A {
393        match self.bits {
394            false => DRIFTSELECT_A::_0,
395            true => DRIFTSELECT_A::_1,
396        }
397    }
398    #[doc = "Checks if the value of the field is `_0`"]
399    #[inline(always)]
400    pub fn is_0(&self) -> bool {
401        *self == DRIFTSELECT_A::_0
402    }
403    #[doc = "Checks if the value of the field is `_1`"]
404    #[inline(always)]
405    pub fn is_1(&self) -> bool {
406        *self == DRIFTSELECT_A::_1
407    }
408}
409#[doc = "Field `DRIFT` writer - Drift compensation"]
410pub type DRIFT_W<'a, const O: u8> = crate::BitWriter<'a, u32, MAN_SPEC, DRIFTSELECT_A, O>;
411impl<'a, const O: u8> DRIFT_W<'a, O> {
412    #[doc = "The USART can not recover from an important clock drift"]
413    #[inline(always)]
414    pub fn _0(self) -> &'a mut W {
415        self.variant(DRIFTSELECT_A::_0)
416    }
417    #[doc = "The USART can recover from clock drift. The 16X clock mode must be enabled"]
418    #[inline(always)]
419    pub fn _1(self) -> &'a mut W {
420        self.variant(DRIFTSELECT_A::_1)
421    }
422}
423impl R {
424    #[doc = "Bits 0:3 - Transmitter Preamble Length"]
425    #[inline(always)]
426    pub fn tx_pl(&self) -> TX_PL_R {
427        TX_PL_R::new((self.bits & 0x0f) as u8)
428    }
429    #[doc = "Bits 8:9 - Transmitter Preamble Pattern"]
430    #[inline(always)]
431    pub fn tx_pp(&self) -> TX_PP_R {
432        TX_PP_R::new(((self.bits >> 8) & 3) as u8)
433    }
434    #[doc = "Bit 12 - Transmitter Manchester Polarity"]
435    #[inline(always)]
436    pub fn tx_mpol(&self) -> TX_MPOL_R {
437        TX_MPOL_R::new(((self.bits >> 12) & 1) != 0)
438    }
439    #[doc = "Bits 16:19 - Receiver Preamble Length"]
440    #[inline(always)]
441    pub fn rx_pl(&self) -> RX_PL_R {
442        RX_PL_R::new(((self.bits >> 16) & 0x0f) as u8)
443    }
444    #[doc = "Bits 24:25 - Receiver Preamble Pattern detected"]
445    #[inline(always)]
446    pub fn rx_pp(&self) -> RX_PP_R {
447        RX_PP_R::new(((self.bits >> 24) & 3) as u8)
448    }
449    #[doc = "Bit 28 - Receiver Manchester Polarity"]
450    #[inline(always)]
451    pub fn rx_mpol(&self) -> RX_MPOL_R {
452        RX_MPOL_R::new(((self.bits >> 28) & 1) != 0)
453    }
454    #[doc = "Bit 30 - Drift compensation"]
455    #[inline(always)]
456    pub fn drift(&self) -> DRIFT_R {
457        DRIFT_R::new(((self.bits >> 30) & 1) != 0)
458    }
459}
460impl W {
461    #[doc = "Bits 0:3 - Transmitter Preamble Length"]
462    #[inline(always)]
463    #[must_use]
464    pub fn tx_pl(&mut self) -> TX_PL_W<0> {
465        TX_PL_W::new(self)
466    }
467    #[doc = "Bits 8:9 - Transmitter Preamble Pattern"]
468    #[inline(always)]
469    #[must_use]
470    pub fn tx_pp(&mut self) -> TX_PP_W<8> {
471        TX_PP_W::new(self)
472    }
473    #[doc = "Bit 12 - Transmitter Manchester Polarity"]
474    #[inline(always)]
475    #[must_use]
476    pub fn tx_mpol(&mut self) -> TX_MPOL_W<12> {
477        TX_MPOL_W::new(self)
478    }
479    #[doc = "Bits 16:19 - Receiver Preamble Length"]
480    #[inline(always)]
481    #[must_use]
482    pub fn rx_pl(&mut self) -> RX_PL_W<16> {
483        RX_PL_W::new(self)
484    }
485    #[doc = "Bits 24:25 - Receiver Preamble Pattern detected"]
486    #[inline(always)]
487    #[must_use]
488    pub fn rx_pp(&mut self) -> RX_PP_W<24> {
489        RX_PP_W::new(self)
490    }
491    #[doc = "Bit 28 - Receiver Manchester Polarity"]
492    #[inline(always)]
493    #[must_use]
494    pub fn rx_mpol(&mut self) -> RX_MPOL_W<28> {
495        RX_MPOL_W::new(self)
496    }
497    #[doc = "Bit 30 - Drift compensation"]
498    #[inline(always)]
499    #[must_use]
500    pub fn drift(&mut self) -> DRIFT_W<30> {
501        DRIFT_W::new(self)
502    }
503    #[doc = "Writes raw bits to the register."]
504    #[inline(always)]
505    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
506        self.0.bits(bits);
507        self
508    }
509}
510#[doc = "Manchester Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [man](index.html) module"]
511pub struct MAN_SPEC;
512impl crate::RegisterSpec for MAN_SPEC {
513    type Ux = u32;
514}
515#[doc = "`read()` method returns [man::R](R) reader structure"]
516impl crate::Readable for MAN_SPEC {
517    type Reader = R;
518}
519#[doc = "`write(|w| ..)` method takes [man::W](W) writer structure"]
520impl crate::Writable for MAN_SPEC {
521    type Writer = W;
522    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
523    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
524}
525#[doc = "`reset()` method sets MAN to value 0x3001_1004"]
526impl crate::Resettable for MAN_SPEC {
527    const RESET_VALUE: Self::Ux = 0x3001_1004;
528}
atsam4ls2b_pac/usart0/man.rs

atsam4ls2b_pac/usart0/
man.rs
