atsam4lc8c/aesa/ctrl/
mod.rs1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::CTRL {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct ENABLER {
47 bits: bool,
48}
49impl ENABLER {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bit(&self) -> bool {
53 self.bits
54 }
55 #[doc = r" Returns `true` if the bit is clear (0)"]
56 #[inline]
57 pub fn bit_is_clear(&self) -> bool {
58 !self.bit()
59 }
60 #[doc = r" Returns `true` if the bit is set (1)"]
61 #[inline]
62 pub fn bit_is_set(&self) -> bool {
63 self.bit()
64 }
65}
66#[doc = r" Proxy"]
67pub struct _ENABLEW<'a> {
68 w: &'a mut W,
69}
70impl<'a> _ENABLEW<'a> {
71 #[doc = r" Sets the field bit"]
72 pub fn set_bit(self) -> &'a mut W {
73 self.bit(true)
74 }
75 #[doc = r" Clears the field bit"]
76 pub fn clear_bit(self) -> &'a mut W {
77 self.bit(false)
78 }
79 #[doc = r" Writes raw bits to the field"]
80 #[inline]
81 pub fn bit(self, value: bool) -> &'a mut W {
82 const MASK: bool = true;
83 const OFFSET: u8 = 0;
84 self.w.bits &= !((MASK as u32) << OFFSET);
85 self.w.bits |= ((value & MASK) as u32) << OFFSET;
86 self.w
87 }
88}
89#[doc = r" Proxy"]
90pub struct _DKEYGENW<'a> {
91 w: &'a mut W,
92}
93impl<'a> _DKEYGENW<'a> {
94 #[doc = r" Sets the field bit"]
95 pub fn set_bit(self) -> &'a mut W {
96 self.bit(true)
97 }
98 #[doc = r" Clears the field bit"]
99 pub fn clear_bit(self) -> &'a mut W {
100 self.bit(false)
101 }
102 #[doc = r" Writes raw bits to the field"]
103 #[inline]
104 pub fn bit(self, value: bool) -> &'a mut W {
105 const MASK: bool = true;
106 const OFFSET: u8 = 1;
107 self.w.bits &= !((MASK as u32) << OFFSET);
108 self.w.bits |= ((value & MASK) as u32) << OFFSET;
109 self.w
110 }
111}
112#[doc = r" Proxy"]
113pub struct _NEWMSGW<'a> {
114 w: &'a mut W,
115}
116impl<'a> _NEWMSGW<'a> {
117 #[doc = r" Sets the field bit"]
118 pub fn set_bit(self) -> &'a mut W {
119 self.bit(true)
120 }
121 #[doc = r" Clears the field bit"]
122 pub fn clear_bit(self) -> &'a mut W {
123 self.bit(false)
124 }
125 #[doc = r" Writes raw bits to the field"]
126 #[inline]
127 pub fn bit(self, value: bool) -> &'a mut W {
128 const MASK: bool = true;
129 const OFFSET: u8 = 2;
130 self.w.bits &= !((MASK as u32) << OFFSET);
131 self.w.bits |= ((value & MASK) as u32) << OFFSET;
132 self.w
133 }
134}
135#[doc = r" Proxy"]
136pub struct _SWRSTW<'a> {
137 w: &'a mut W,
138}
139impl<'a> _SWRSTW<'a> {
140 #[doc = r" Sets the field bit"]
141 pub fn set_bit(self) -> &'a mut W {
142 self.bit(true)
143 }
144 #[doc = r" Clears the field bit"]
145 pub fn clear_bit(self) -> &'a mut W {
146 self.bit(false)
147 }
148 #[doc = r" Writes raw bits to the field"]
149 #[inline]
150 pub fn bit(self, value: bool) -> &'a mut W {
151 const MASK: bool = true;
152 const OFFSET: u8 = 8;
153 self.w.bits &= !((MASK as u32) << OFFSET);
154 self.w.bits |= ((value & MASK) as u32) << OFFSET;
155 self.w
156 }
157}
158impl R {
159 #[doc = r" Value of the register as raw bits"]
160 #[inline]
161 pub fn bits(&self) -> u32 {
162 self.bits
163 }
164 #[doc = "Bit 0 - Enable Module"]
165 #[inline]
166 pub fn enable(&self) -> ENABLER {
167 let bits = {
168 const MASK: bool = true;
169 const OFFSET: u8 = 0;
170 ((self.bits >> OFFSET) & MASK as u32) != 0
171 };
172 ENABLER { bits }
173 }
174}
175impl W {
176 #[doc = r" Reset value of the register"]
177 #[inline]
178 pub fn reset_value() -> W {
179 W { bits: 0 }
180 }
181 #[doc = r" Writes raw bits to the register"]
182 #[inline]
183 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
184 self.bits = bits;
185 self
186 }
187 #[doc = "Bit 0 - Enable Module"]
188 #[inline]
189 pub fn enable(&mut self) -> _ENABLEW {
190 _ENABLEW { w: self }
191 }
192 #[doc = "Bit 1 - Decryption Key Generate"]
193 #[inline]
194 pub fn dkeygen(&mut self) -> _DKEYGENW {
195 _DKEYGENW { w: self }
196 }
197 #[doc = "Bit 2 - New Message"]
198 #[inline]
199 pub fn newmsg(&mut self) -> _NEWMSGW {
200 _NEWMSGW { w: self }
201 }
202 #[doc = "Bit 8 - Software Reset"]
203 #[inline]
204 pub fn swrst(&mut self) -> _SWRSTW {
205 _SWRSTW { w: self }
206 }
207}