Expand description
Peripheral access API for ATSAM4LC8A microcontrollers (generated using svd2rust v0.27.2 ( ))
You can find an overview of the generated API here.
API features to be included in the next
svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.
Re-exports§
pub use self::Interrupt as interrupt;pub use self::tc0 as tc1;pub use self::twim0 as twim1;pub use self::twim0 as twim2;pub use self::twim0 as twim3;pub use self::twis0 as twis1;pub use self::usart0 as usart1;pub use self::usart0 as usart2;pub use self::usart0 as usart3;
Modules§
- abdacb
- Audio Bitstream DAC
- acifc
- Analog Comparator Interface
- adcife
- ADC controller interface
- aesa
- Advanced Encryption Standard
- ast
- Asynchronous Timer
- bpm
- Backup Power Manager
- bscif
- Backup System Control Interface
- catb
- Capacitive Touch Module B
- chipid
- Chip ID Registers
- crccu
- CRC Calculation Unit
- dacc
- DAC Controller
- eic
- External Interrupt Controller
- freqm
- Frequency Meter
- generic
- Common register and bit access and modify traits
- gloc
- Glue Logic Controller
- gpio
- General-Purpose Input/Output Controller
- hcache
- Cortex M I&D Cache Controller
- hflashc
- Flash Controller
- hmatrix
- HSB Matrix
- iisc
- Inter-IC Sound (I2S) Controller
- lcdca
- LCD Controller
- parc
- Parallel Capture
- pdca
- Peripheral DMA Controller
- pevc
- Peripheral Event Controller
- picouart
- Pico UART
- pm
- Power Manager
- scif
- System Control Interface
- smap
- System Manager Access Port
- spi
- Serial Peripheral Interface
- tc0
- Timer/Counter 0
- trng
- True Random Number Generator
- twim0
- Two-wire Master Interface 0
- twis0
- Two-wire Slave Interface 0
- usart0
- Universal Synchronous Asynchronous Receiver Transmitter 0
- usbc
- USB 2.0 Interface
- wdt
- Watchdog Timer
Structs§
- ABDACB
- Audio Bitstream DAC
- ACIFC
- Analog Comparator Interface
- ADCIFE
- ADC controller interface
- AESA
- Advanced Encryption Standard
- AST
- Asynchronous Timer
- BPM
- Backup Power Manager
- BSCIF
- Backup System Control Interface
- CATB
- Capacitive Touch Module B
- CBP
- Cache and branch predictor maintenance operations
- CHIPID
- Chip ID Registers
- CPUID
- CPUID
- CRCCU
- CRC Calculation Unit
- Core
Peripherals - Core peripherals
- DACC
- DAC Controller
- DCB
- Debug Control Block
- DWT
- Data Watchpoint and Trace unit
- EIC
- External Interrupt Controller
- FPB
- Flash Patch and Breakpoint unit
- FREQM
- Frequency Meter
- GLOC
- Glue Logic Controller
- GPIO
- General-Purpose Input/Output Controller
- HCACHE
- Cortex M I&D Cache Controller
- HFLASHC
- Flash Controller
- HMATRIX
- HSB Matrix
- IISC
- Inter-IC Sound (I2S) Controller
- ITM
- Instrumentation Trace Macrocell
- LCDCA
- LCD Controller
- MPU
- Memory Protection Unit
- NVIC
- Nested Vector Interrupt Controller
- PARC
- Parallel Capture
- PDCA
- Peripheral DMA Controller
- PEVC
- Peripheral Event Controller
- PICOUART
- Pico UART
- PM
- Power Manager
- Peripherals
- All the peripherals.
- SCB
- System Control Block
- SCIF
- System Control Interface
- SMAP
- System Manager Access Port
- SPI
- Serial Peripheral Interface
- SYST
- SysTick: System Timer
- TC0
- Timer/Counter 0
- TC1
- Timer/Counter 1
- TPIU
- Trace Port Interface Unit
- TRNG
- True Random Number Generator
- TWIM0
- Two-wire Master Interface 0
- TWIM1
- Two-wire Master Interface 1
- TWIM2
- Two-wire Master Interface 2
- TWIM3
- Two-wire Master Interface 3
- TWIS0
- Two-wire Slave Interface 0
- TWIS1
- Two-wire Slave Interface 1
- USART0
- Universal Synchronous Asynchronous Receiver Transmitter 0
- USART1
- Universal Synchronous Asynchronous Receiver Transmitter 1
- USART2
- Universal Synchronous Asynchronous Receiver Transmitter 2
- USART3
- Universal Synchronous Asynchronous Receiver Transmitter 3
- USBC
- USB 2.0 Interface
- WDT
- Watchdog Timer
Enums§
- Interrupt
- Enumeration of all the interrupts.
Constants§
- NVIC_
PRIO_ BITS - Number available in the NVIC for configuring priority