Module atsam4lc4b_pac::twis0

Two-wire Slave Interface 0

Modules

• cr
  Control Register
• hssrr
  HS-mode Slew Rate Register
• hstr
  HS-mode Timing Register
• idr
  Interrupt Disable Register
• ier
  Interrupt Enable Register
• imr
  Interrupt Mask Register
• nbytes
  NBYTES Register
• pecr
  Packet Error Check Register
• pr
  Parameter Register
• rhr
  Receive Holding Register
• scr
  Status Clear Register
• sr
  Status Register
• srr
  Slew Rate Register
• thr
  Transmit Holding Register
• tr
  Timing Register
• vr
  Version Register

Structs

• RegisterBlock
  Register block

Type Definitions

• CR
  CR (rw) register accessor: an alias for Reg<CR_SPEC>
• HSSRR
  HSSRR (rw) register accessor: an alias for Reg<HSSRR_SPEC>
• HSTR
  HSTR (rw) register accessor: an alias for Reg<HSTR_SPEC>
• IDR
  IDR (w) register accessor: an alias for Reg<IDR_SPEC>
• IER
  IER (w) register accessor: an alias for Reg<IER_SPEC>
• IMR
  IMR (r) register accessor: an alias for Reg<IMR_SPEC>
• NBYTES
  NBYTES (rw) register accessor: an alias for Reg<NBYTES_SPEC>
• PECR
  PECR (r) register accessor: an alias for Reg<PECR_SPEC>
• PR
  PR (r) register accessor: an alias for Reg<PR_SPEC>
• RHR
  RHR (r) register accessor: an alias for Reg<RHR_SPEC>
• SCR
  SCR (w) register accessor: an alias for Reg<SCR_SPEC>
• SR
  SR (r) register accessor: an alias for Reg<SR_SPEC>
• SRR
  SRR (rw) register accessor: an alias for Reg<SRR_SPEC>
• THR
  THR (w) register accessor: an alias for Reg<THR_SPEC>
• TR
  TR (rw) register accessor: an alias for Reg<TR_SPEC>
• VR
  VR (r) register accessor: an alias for Reg<VR_SPEC>