Crate atsam4lc2a_pac[][src]

Expand description

Peripheral access API for ATSAM4LC2A microcontrollers (generated using svd2rust v0.19.0 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports

pub use self::Interrupt as interrupt;

Modules

Audio Bitstream DAC

Analog Comparator Interface

ADC controller interface

Advanced Encryption Standard

Asynchronous Timer

Backup Power Manager

Backup System Control Interface

Capacitive Touch Module B

Chip ID Registers

CRC Calculation Unit

DAC Controller

External Interrupt Controller

Frequency Meter

Common register and bit access and modify traits

Glue Logic Controller

General-Purpose Input/Output Controller

Cortex M I&D Cache Controller

Flash Controller

HSB Matrix

Inter-IC Sound (I2S) Controller

LCD Controller

Parallel Capture

Peripheral DMA Controller

Peripheral Event Controller

Pico UART

Power Manager

System Control Interface

System Manager Access Port

Serial Peripheral Interface

Timer/Counter 0

True Random Number Generator

Two-wire Master Interface 0

Two-wire Slave Interface 0

Universal Synchronous Asynchronous Receiver Transmitter 0

USB 2.0 Interface

Watchdog Timer

Structs

Audio Bitstream DAC

Analog Comparator Interface

ADC controller interface

Advanced Encryption Standard

Asynchronous Timer

Backup Power Manager

Backup System Control Interface

Capacitive Touch Module B

Cache and branch predictor maintenance operations

Chip ID Registers

CPUID

CRC Calculation Unit

Core peripherals

DAC Controller

Debug Control Block

Data Watchpoint and Trace unit

External Interrupt Controller

Flash Patch and Breakpoint unit

Frequency Meter

Glue Logic Controller

General-Purpose Input/Output Controller

Cortex M I&D Cache Controller

Flash Controller

HSB Matrix

Inter-IC Sound (I2S) Controller

Instrumentation Trace Macrocell

LCD Controller

Memory Protection Unit

Nested Vector Interrupt Controller

Parallel Capture

Peripheral DMA Controller

Peripheral Event Controller

Pico UART

Power Manager

All the peripherals

System Control Block

System Control Interface

System Manager Access Port

Serial Peripheral Interface

SysTick: System Timer

Timer/Counter 0

Timer/Counter 1

Trace Port Interface Unit

True Random Number Generator

Two-wire Master Interface 0

Two-wire Master Interface 1

Two-wire Master Interface 2

Two-wire Master Interface 3

Two-wire Slave Interface 0

Two-wire Slave Interface 1

Universal Synchronous Asynchronous Receiver Transmitter 0

Universal Synchronous Asynchronous Receiver Transmitter 1

Universal Synchronous Asynchronous Receiver Transmitter 2

Universal Synchronous Asynchronous Receiver Transmitter 3

USB 2.0 Interface

Watchdog Timer

Enums

Enumeration of all the interrupts.

Constants

Number available in the NVIC for configuring priority

Attribute Macros