Expand description

Peripheral access API for ATSAM4E8C microcontrollers (generated using svd2rust v0.19.0 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports

pub use self::Interrupt as interrupt;

Modules

Analog Comparator Controller

Advanced Encryption Standard

Analog-Front-End Controller 0

Analog-Front-End Controller 1

Controller Area Network 0

Chip Identifier

Cortex M Cache Controller

Digital-to-Analog Converter Controller

DMA Controller

Embedded Flash Controller

Common register and bit access and modify traits

Gigabit Ethernet MAC

General Purpose Backup Registers

High Speed MultiMedia Card Interface

AHB Bus Matrix

Parallel Input/Output Controller A

Parallel Input/Output Controller B

Parallel Input/Output Controller D

Power Management Controller

Pulse Width Modulation Controller

Reset Controller

Reinforced Safety Watchdog Timer

Real-time Clock

Real-time Timer

Serial Peripheral Interface

Supply Controller

Timer Counter 0

Two-wire Interface 0

Two-wire Interface 1

Universal Asynchronous Receiver Transmitter 0

Universal Asynchronous Receiver Transmitter 1

USB Device Port

Universal Synchronous Asynchronous Receiver Transmitter 0

Universal Synchronous Asynchronous Receiver Transmitter 1

Watchdog Timer

Structs

Analog Comparator Controller

Advanced Encryption Standard

Analog-Front-End Controller 0

Analog-Front-End Controller 1

Controller Area Network 0

Cache and branch predictor maintenance operations

Chip Identifier

Cortex M Cache Controller

CPUID

Core peripherals

Digital-to-Analog Converter Controller

Debug Control Block

DMA Controller

Data Watchpoint and Trace unit

Embedded Flash Controller

Flash Patch and Breakpoint unit

Floating Point Unit

Gigabit Ethernet MAC

General Purpose Backup Registers

High Speed MultiMedia Card Interface

Instrumentation Trace Macrocell

AHB Bus Matrix

Memory Protection Unit

Nested Vector Interrupt Controller

Parallel Input/Output Controller A

Parallel Input/Output Controller B

Parallel Input/Output Controller D

Power Management Controller

Pulse Width Modulation Controller

All the peripherals

Reset Controller

Reinforced Safety Watchdog Timer

Real-time Clock

Real-time Timer

System Control Block

Serial Peripheral Interface

Supply Controller

SysTick: System Timer

Timer Counter 0

Trace Port Interface Unit

Two-wire Interface 0

Two-wire Interface 1

Universal Asynchronous Receiver Transmitter 0

Universal Asynchronous Receiver Transmitter 1

USB Device Port

Universal Synchronous Asynchronous Receiver Transmitter 0

Universal Synchronous Asynchronous Receiver Transmitter 1

Watchdog Timer

Enums

Enumeration of all the interrupts.

Constants

Number available in the NVIC for configuring priority

Attribute Macros