[−][src]Module ambiq_apollo3p_pac::ctimer::stcfg
ST Configuration
Structs
CLEAR_W | Write proxy for field |
CLKSEL_W | Write proxy for field |
COMPARE_A_EN_W | Write proxy for field |
COMPARE_B_EN_W | Write proxy for field |
COMPARE_C_EN_W | Write proxy for field |
COMPARE_D_EN_W | Write proxy for field |
COMPARE_E_EN_W | Write proxy for field |
COMPARE_F_EN_W | Write proxy for field |
COMPARE_G_EN_W | Write proxy for field |
COMPARE_H_EN_W | Write proxy for field |
FREEZE_W | Write proxy for field |
Enums
CLEAR_A | Set this bit to one to clear the System Timer register. If this bit is set to '1', the system timer register will stay cleared. It needs to be set to '0' for the system timer to start running. |
CLKSEL_A | Selects an appropriate clock source and divider to use for the System Timer clock. |
COMPARE_A_EN_A | Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparison is met. |
COMPARE_B_EN_A | Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparison is met. |
COMPARE_C_EN_A | Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparison is met. |
COMPARE_D_EN_A | Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparison is met. |
COMPARE_E_EN_A | Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparison is met. |
COMPARE_F_EN_A | Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparison is met. |
COMPARE_G_EN_A | Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparison is met. |
COMPARE_H_EN_A | Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparison is met. |
FREEZE_A | Set this bit to one to freeze the clock input to the COUNTER register. Once frozen, the value can be safely written from the MCU. Unfreeze to resume. |
Type Definitions
CLEAR_R | Reader of field |
CLKSEL_R | Reader of field |
COMPARE_A_EN_R | Reader of field |
COMPARE_B_EN_R | Reader of field |
COMPARE_C_EN_R | Reader of field |
COMPARE_D_EN_R | Reader of field |
COMPARE_E_EN_R | Reader of field |
COMPARE_F_EN_R | Reader of field |
COMPARE_G_EN_R | Reader of field |
COMPARE_H_EN_R | Reader of field |
FREEZE_R | Reader of field |
R | Reader of register STCFG |
W | Writer for register STCFG |