[][src]Module ambiq_apollo2_pac::ctimer

Counter/Timer

Modules

capture_control

Capture Control Register

cmpra0

Counter/Timer A0 Compare Registers

cmpra1

Counter/Timer A1 Compare Registers

cmpra2

Counter/Timer A2 Compare Registers

cmpra3

Counter/Timer A3 Compare Registers

cmprb0

Counter/Timer B0 Compare Registers

cmprb1

Counter/Timer B1 Compare Registers

cmprb2

Counter/Timer B2 Compare Registers

cmprb3

Counter/Timer B3 Compare Registers

ctrl0

Counter/Timer Control

ctrl1

Counter/Timer Control

ctrl2

Counter/Timer Control

ctrl3

Counter/Timer Control

intclr

Counter/Timer Interrupts: Clear

inten

Counter/Timer Interrupts: Enable

intset

Counter/Timer Interrupts: Set

intstat

Counter/Timer Interrupts: Status

scapt0

Capture Register A

scapt1

Capture Register B

scapt2

Capture Register C

scapt3

Capture Register D

scmpr0

Compare Register A

scmpr1

Compare Register B

scmpr2

Compare Register C

scmpr3

Compare Register D

scmpr4

Compare Register E

scmpr5

Compare Register F

scmpr6

Compare Register G

scmpr7

Compare Register H

snvr0

System Timer NVRAM_A Register

snvr1

System Timer NVRAM_B Register

snvr2

System Timer NVRAM_C Register

stcfg

Configuration Register

stmintclr

STIMER Interrupt registers: Clear

stminten

STIMER Interrupt registers: Enable

stmintset

STIMER Interrupt registers: Set

stmintstat

STIMER Interrupt registers: Status

sttmr

System Timer Count Register (Real Time Counter)

tmr0

Counter/Timer Register

tmr1

Counter/Timer Register

tmr2

Counter/Timer Register

tmr3

Counter/Timer Register

Structs

RegisterBlock

Register block

Type Definitions

CAPTURE_CONTROL

Capture Control Register

CMPRA0

Counter/Timer A0 Compare Registers

CMPRA1

Counter/Timer A1 Compare Registers

CMPRA2

Counter/Timer A2 Compare Registers

CMPRA3

Counter/Timer A3 Compare Registers

CMPRB0

Counter/Timer B0 Compare Registers

CMPRB1

Counter/Timer B1 Compare Registers

CMPRB2

Counter/Timer B2 Compare Registers

CMPRB3

Counter/Timer B3 Compare Registers

CTRL0

Counter/Timer Control

CTRL1

Counter/Timer Control

CTRL2

Counter/Timer Control

CTRL3

Counter/Timer Control

INTCLR

Counter/Timer Interrupts: Clear

INTEN

Counter/Timer Interrupts: Enable

INTSET

Counter/Timer Interrupts: Set

INTSTAT

Counter/Timer Interrupts: Status

SCAPT0

Capture Register A

SCAPT1

Capture Register B

SCAPT2

Capture Register C

SCAPT3

Capture Register D

SCMPR0

Compare Register A

SCMPR1

Compare Register B

SCMPR2

Compare Register C

SCMPR3

Compare Register D

SCMPR4

Compare Register E

SCMPR5

Compare Register F

SCMPR6

Compare Register G

SCMPR7

Compare Register H

SNVR0

System Timer NVRAM_A Register

SNVR1

System Timer NVRAM_B Register

SNVR2

System Timer NVRAM_C Register

STCFG

Configuration Register

STMINTCLR

STIMER Interrupt registers: Clear

STMINTEN

STIMER Interrupt registers: Enable

STMINTSET

STIMER Interrupt registers: Set

STMINTSTAT

STIMER Interrupt registers: Status

STTMR

System Timer Count Register (Real Time Counter)

TMR0

Counter/Timer Register

TMR1

Counter/Timer Register

TMR2

Counter/Timer Register

TMR3

Counter/Timer Register