[][src]Module ambiq_apollo1_pac::ctimer::ctrl1

Counter/Timer Control

Structs

CTLINK1_W

Write proxy for field CTLINK1

TMRA1POL_W

Write proxy for field TMRA1POL

TMRA1CLR_W

Write proxy for field TMRA1CLR

TMRA1PE_W

Write proxy for field TMRA1PE

TMRA1IE_W

Write proxy for field TMRA1IE

TMRA1FN_W

Write proxy for field TMRA1FN

TMRA1CLK_W

Write proxy for field TMRA1CLK

TMRA1EN_W

Write proxy for field TMRA1EN

TMRB1POL_W

Write proxy for field TMRB1POL

TMRB1CLR_W

Write proxy for field TMRB1CLR

TMRB1PE_W

Write proxy for field TMRB1PE

TMRB1IE_W

Write proxy for field TMRB1IE

TMRB1FN_W

Write proxy for field TMRB1FN

TMRB1CLK_W

Write proxy for field TMRB1CLK

TMRB1EN_W

Write proxy for field TMRB1EN

Enums

CTLINK1_A

Counter/Timer A1/B1 Link bit.

TMRA1POL_A

Counter/Timer A1 output polarity.

TMRA1CLR_A

Counter/Timer A1 Clear bit.

TMRA1PE_A

Counter/Timer A1 Output Enable bit.

TMRA1IE_A

Counter/Timer A1 Interrupt Enable bit.

TMRA1FN_A

Counter/Timer A1 Function Select.

TMRA1CLK_A

Counter/Timer A1 Clock Select.

TMRA1EN_A

Counter/Timer A1 Enable bit.

TMRB1POL_A

Counter/Timer B1 output polarity.

TMRB1CLR_A

Counter/Timer B1 Clear bit.

TMRB1PE_A

Counter/Timer B1 Output Enable bit.

TMRB1IE_A

Counter/Timer B1 Interrupt Enable bit.

TMRB1FN_A

Counter/Timer B1 Function Select.

TMRB1CLK_A

Counter/Timer B1 Clock Select.

TMRB1EN_A

Counter/Timer B1 Enable bit.

Type Definitions

CTLINK1_R

Reader of field CTLINK1

R

Reader of register CTRL1

TMRA1POL_R

Reader of field TMRA1POL

TMRA1CLR_R

Reader of field TMRA1CLR

TMRA1PE_R

Reader of field TMRA1PE

TMRA1IE_R

Reader of field TMRA1IE

TMRA1FN_R

Reader of field TMRA1FN

TMRA1CLK_R

Reader of field TMRA1CLK

TMRA1EN_R

Reader of field TMRA1EN

TMRB1POL_R

Reader of field TMRB1POL

TMRB1CLR_R

Reader of field TMRB1CLR

TMRB1PE_R

Reader of field TMRB1PE

TMRB1IE_R

Reader of field TMRB1IE

TMRB1FN_R

Reader of field TMRB1FN

TMRB1CLK_R

Reader of field TMRB1CLK

TMRB1EN_R

Reader of field TMRB1EN

W

Writer for register CTRL1