[−][src]Module ambiq_apollo1_pac::adc
Analog Digital Converter Control
Modules
| cfg | Configuration Register |
| fifo | FIFO Data and Valid Count Register |
| intclr | ADC Interrupt registers: Clear |
| inten | ADC Interrupt registers: Enable |
| intset | ADC Interrupt registers: Set |
| intstat | ADC Interrupt registers: Status |
| sl0cfg | Slot 0 Configuration Register |
| sl1cfg | Slot 1 Configuration Register |
| sl2cfg | Slot 2 Configuration Register |
| sl3cfg | Slot 3 Configuration Register |
| sl4cfg | Slot 4 Configuration Register |
| sl5cfg | Slot 5 Configuration Register |
| sl6cfg | Slot 6 Configuration Register |
| sl7cfg | Slot 7 Configuration Register |
| stat | ADC Power Status |
| swt | Software trigger |
| wlim | Window Comparator Limits Register |
Structs
| RegisterBlock | Register block |
Type Definitions
| CFG | Configuration Register |
| FIFO | FIFO Data and Valid Count Register |
| INTCLR | ADC Interrupt registers: Clear |
| INTEN | ADC Interrupt registers: Enable |
| INTSET | ADC Interrupt registers: Set |
| INTSTAT | ADC Interrupt registers: Status |
| SL0CFG | Slot 0 Configuration Register |
| SL1CFG | Slot 1 Configuration Register |
| SL2CFG | Slot 2 Configuration Register |
| SL3CFG | Slot 3 Configuration Register |
| SL4CFG | Slot 4 Configuration Register |
| SL5CFG | Slot 5 Configuration Register |
| SL6CFG | Slot 6 Configuration Register |
| SL7CFG | Slot 7 Configuration Register |
| STAT | ADC Power Status |
| SWT | Software trigger |
| WLIM | Window Comparator Limits Register |