[−][src]Module accel::memory
Memory management
Unified address
- All memories are mapped into a single 64bit memory space
- We can get where the pointed memory exists from its value.
Memory Types
| name | where exists | From Host | From Device | As slice | Description |
|---|---|---|---|---|---|
| (usual) Host memory | Host | ✓ | - | ✓ | allocated by usual manner, e.g. vec![0; n] |
| Registered Host memory | Host | ✓ | ✓ | ✓ | A host memory registered into CUDA memory management system |
| Page-locked Host memory | Host | ✓ | ✓ | ✓ | OS memory paging is disabled for accelerating memory transfer |
| Device memory | Device | ✓ | ✓ | ✓ | allocated on device as a single span |
| Array | Device | ✓ | ✓ | - | properly aligned memory on device for using Texture and Surface memory |
Structs
| Array | |
| ArrayFlag | |
| DeviceMemory | Memory allocated on the device. |
| Ix1 | Spec of 1D Array |
| Ix1Layered | Spec of Layered 1D Array |
| Ix2 | Spec of 2D Array |
| Ix2Layered | Spec of Layered 2D Array |
| Ix3 | Spec of 3D Array |
| PageLockedMemory | Host memory as page-locked. |
| RegisteredMemory |
Enums
| ArrayFormatTag | |
| MemoryType | Memory type |
| NumChannels | This specifies the number of packed elements per "CUDA array element". |
Traits
| Allocatable | Allocatable memories with CUDA context |
| Continuous | Memory which has continuous 1D index, i.e. can be treated as a Rust slice |
| Dimension | |
| Managed | Memory which is managed under the CUDA unified memory management systems |
| Memcpy | Copy data from one to another |
| Memory | Has unique head address and allocated size. |
| Memset | Set all elements by |
| Scalar |
Functions
| free_memory | Get free memory size in bytes of the current device |
| total_memory | Get total memory size in bytes of the current device |
Type Definitions
| Descriptor |