[][src]Module ADuCM302x::crypt0

Register Map for the Crypto Block

Modules

aeskey0

AES Key Bits [31:0]

aeskey1

AES Key Bits [63:32]

aeskey2

AES Key Bits [95:64]

aeskey3

AES Key Bits [127:96]

aeskey4

AES Key Bits [159:128]

aeskey5

AES Key Bits [191:160]

aeskey6

AES Key Bits [223:192]

aeskey7

AES Key Bits [255:224]

ccm_num_valid_bytes

NUM_VALID_BYTES

cfg

Configuration Register

cntrinit

Counter Initialization Vector

datalen

Payload Data Length

inbuf

Input Buffer

inten

Interrupt Enable Register

nonce0

Nonce Bits [31:0]

nonce1

Nonce Bits [63:32]

nonce2

Nonce Bits [95:64]

nonce3

Nonce Bits [127:96]

outbuf

Output Buffer

prefixlen

Authentication Data Length

sha_last_word

SHA Last Word and Valid Bits Information

shah0

SHA Bits [31:0]

shah1

SHA Bits [63:32]

shah2

SHA Bits [95:64]

shah3

SHA Bits [127:96]

shah4

SHA Bits [159:128]

shah5

SHA Bits [191:160]

shah6

SHA Bits [223:192]

shah7

SHA Bits [255:224]

stat

Status Register

Structs

RegisterBlock

Register block

Type Definitions

AESKEY0

AES Key Bits [31:0]

AESKEY1

AES Key Bits [63:32]

AESKEY2

AES Key Bits [95:64]

AESKEY3

AES Key Bits [127:96]

AESKEY4

AES Key Bits [159:128]

AESKEY5

AES Key Bits [191:160]

AESKEY6

AES Key Bits [223:192]

AESKEY7

AES Key Bits [255:224]

CCM_NUM_VALID_BYTES

NUM_VALID_BYTES

CFG

Configuration Register

CNTRINIT

Counter Initialization Vector

DATALEN

Payload Data Length

INBUF

Input Buffer

INTEN

Interrupt Enable Register

NONCE0

Nonce Bits [31:0]

NONCE1

Nonce Bits [63:32]

NONCE2

Nonce Bits [95:64]

NONCE3

Nonce Bits [127:96]

OUTBUF

Output Buffer

PREFIXLEN

Authentication Data Length

SHAH0

SHA Bits [31:0]

SHAH1

SHA Bits [63:32]

SHAH2

SHA Bits [95:64]

SHAH3

SHA Bits [127:96]

SHAH4

SHA Bits [159:128]

SHAH5

SHA Bits [191:160]

SHAH6

SHA Bits [223:192]

SHAH7

SHA Bits [255:224]

SHA_LAST_WORD

SHA Last Word and Valid Bits Information

STAT

Status Register