Module rk3399_pac::usb3
source · Expand description
USB 3.0/2.0 OTG (USB3) Registers
Modules§
- Device Active USB Endpoint Enable Register
- Device Configuration Register
- Device Control Register
- Device Physical Endpoint-n Command Register
- Device Physical Endpoint-n Command Parameter 0 Register
- Device Physical Endpoint-n Command Parameter 1 Register
- Device Physical Endpoint-n Command Parameter 2 Register
- Device Event Enable Register
- Device Generic Command Register
- Device Generic Command Parameter Register
- Device Status Register
- Global SoC Bus Error Address Register - High
- Global SoC Bus Error Address Register - Low
- Global Core Control Register
- Global Debug BMU Register
- Global Debug Endpoint Information Register 0
- Global Debug Endpoint Information Register 1
- Global Debug Queue/FIFO Space Available Register
- Global Debug LNMCC Register
- Global Debug LSP Register
- Global Debug LSP MUX Register - Device
- Global Debug LTSSM Register
- Global Host FIFO DMA High-Low Priority Ratio Register
- Global Event Buffer Address (High) Register 0
- Global Event Buffer Address (Low) Register 0
- Global Event Buffer Count Register 0
- Global Event Buffer Size Register 0
- Global Host Debug Capability DMA Priority Register
- Global Frame Length Adjustment Register
- Global General Purpose Input/Output Register
- Global Hardware Parameters Register 0
- Global Hardware Parameters Register 1
- Global Hardware Parameters Register 2
- Global Hardware Parameters Register 3
- Global Hardware Parameters Register 4
- Global Hardware Parameters Register 5
- Global Hardware Parameters Register 6
- Global Hardware Parameters Register 7
- Global Hardware Parameters Register 8
- Global Power Management Status Register
- Global Full-Speed Port to Bus Instance Mapping Register - Low
- Global High-Speed Port to Bus Instance Mapping Register - Low
- Global SS Port to Bus Instance Mapping Register - Low
- Global Host RX FIFO DMA Priority Register
- Global Receive FIFO Size Register n
- Global Rx Threshold Control Register
- Global SoC Bus Configuration Register 0
- Global SoC Bus Configuration Register 1
- Global SNPS ID Register
- Global Status Register
- Global Device TX FIFO DMA Priority Register
- Global Host TX FIFO DMA Priority Register
- Global Transmit FIFO Size Register n
- Global Tx Threshold Control Register
- Global User Control Register
- Global User Control Register 1
- Global User ID Register
- Global USB2 PHY Configuration Register 0
- Global USB3 PIPE Control Register 0
Structs§
- Register block
Type Aliases§
- DALEPENA (rw) register accessor: Device Active USB Endpoint Enable Register
- DCFG (rw) register accessor: Device Configuration Register
- DCTL (rw) register accessor: Device Control Register
- DEPCMD (rw) register accessor: Device Physical Endpoint-n Command Register
- DEPCMDPAR0 (rw) register accessor: Device Physical Endpoint-n Command Parameter 0 Register
- DEPCMDPAR1 (rw) register accessor: Device Physical Endpoint-n Command Parameter 1 Register
- DEPCMDPAR2 (rw) register accessor: Device Physical Endpoint-n Command Parameter 2 Register
- DEVTEN (rw) register accessor: Device Event Enable Register
- DGCMD (rw) register accessor: Device Generic Command Register
- DGCMDPAR (rw) register accessor: Device Generic Command Parameter Register
- DSTS (r) register accessor: Device Status Register
- GBUSERRADDRHI (r) register accessor: Global SoC Bus Error Address Register - High
- GBUSERRADDRLO (r) register accessor: Global SoC Bus Error Address Register - Low
- GCTL (rw) register accessor: Global Core Control Register
- GDBGBMU (rw) register accessor: Global Debug BMU Register
- GDBGEPINFO0 (r) register accessor: Global Debug Endpoint Information Register 0
- GDBGEPINFO1 (r) register accessor: Global Debug Endpoint Information Register 1
- GDBGFIFOSPACE (rw) register accessor: Global Debug Queue/FIFO Space Available Register
- GDBGLNMCC (r) register accessor: Global Debug LNMCC Register
- GDBGLSP (r) register accessor: Global Debug LSP Register
- GDBGLSPMUX (rw) register accessor: Global Debug LSP MUX Register - Device
- GDBGLTSSM (rw) register accessor: Global Debug LTSSM Register
- GDMAHLRATIO (rw) register accessor: Global Host FIFO DMA High-Low Priority Ratio Register
- GEVNTADRHI0 (rw) register accessor: Global Event Buffer Address (High) Register 0
- GEVNTADRLO0 (rw) register accessor: Global Event Buffer Address (Low) Register 0
- GEVNTCOUNT0 (rw) register accessor: Global Event Buffer Count Register 0
- GEVNTSIZ0 (rw) register accessor: Global Event Buffer Size Register 0
- GFIFOPRIDBC (rw) register accessor: Global Host Debug Capability DMA Priority Register
- GFLADJ (rw) register accessor: Global Frame Length Adjustment Register
- GGPIO (rw) register accessor: Global General Purpose Input/Output Register
- GHWPARAMS0 (r) register accessor: Global Hardware Parameters Register 0
- GHWPARAMS1 (r) register accessor: Global Hardware Parameters Register 1
- GHWPARAMS2 (r) register accessor: Global Hardware Parameters Register 2
- GHWPARAMS3 (r) register accessor: Global Hardware Parameters Register 3
- GHWPARAMS4 (r) register accessor: Global Hardware Parameters Register 4
- GHWPARAMS5 (r) register accessor: Global Hardware Parameters Register 5
- GHWPARAMS6 (r) register accessor: Global Hardware Parameters Register 6
- GHWPARAMS7 (r) register accessor: Global Hardware Parameters Register 7
- GHWPARAMS8 (r) register accessor: Global Hardware Parameters Register 8
- GPMSTS (rw) register accessor: Global Power Management Status Register
- GPRTBIMAP_FSLO (rw) register accessor: Global Full-Speed Port to Bus Instance Mapping Register - Low
- GPRTBIMAP_HSLO (rw) register accessor: Global High-Speed Port to Bus Instance Mapping Register - Low
- GPRTBIMAPLO (rw) register accessor: Global SS Port to Bus Instance Mapping Register - Low
- GRXFIFOPRIHST (rw) register accessor: Global Host RX FIFO DMA Priority Register
- GRXFIFOSIZ (rw) register accessor: Global Receive FIFO Size Register n
- GRXTHRCFG (rw) register accessor: Global Rx Threshold Control Register
- GSBUSCFG0 (rw) register accessor: Global SoC Bus Configuration Register 0
- GSBUSCFG1 (rw) register accessor: Global SoC Bus Configuration Register 1
- GSNPSID (r) register accessor: Global SNPS ID Register
- GSTS (rw) register accessor: Global Status Register
- GTXFIFOPRIDEV (rw) register accessor: Global Device TX FIFO DMA Priority Register
- GTXFIFOPRIHST (rw) register accessor: Global Host TX FIFO DMA Priority Register
- GTXFIFOSIZ (rw) register accessor: Global Transmit FIFO Size Register n
- GTXTHRCFG (rw) register accessor: Global Tx Threshold Control Register
- GUCTL (rw) register accessor: Global User Control Register
- GUCTL1 (rw) register accessor: Global User Control Register 1
- GUID (rw) register accessor: Global User ID Register
- GUSB2PHYCFG0 (rw) register accessor: Global USB2 PHY Configuration Register 0
- GUSB3PIPECTL0 (rw) register accessor: Global USB3 PIPE Control Register 0