Module rk3399_pac::uart

source ·
Expand description

Universal Asynchronous Receiver/Transmitter (UART) Registers

Modules§

  • Component Parameter Register
  • Component Type Register
  • Divisor Latch (High)
  • Divisor Latch (Low)
  • DMA Software Acknowledge
  • FIFO Access Register
  • FIFO Control Register
  • Halt TX
  • Interrupt Enable Register
  • Interrupt Identification Register
  • Line Control Register
  • Line Status Register
  • Modem Control Register
  • Modem Status Register
  • Receive Buffer Register
  • Receive FIFO Level
  • Receive FIFO Write
  • Shadow Break Control Register
  • Scratchpad Register
  • Shadow DMA Mode
  • Shadow FIFO Enable
  • Shadow Receive Buffer Register
  • Software Reset Register
  • Shadow RCVR Trigger
  • Shadow Request to Send
  • Shadow TX Empty Trigger
  • Shadow Transmit Holding Register
  • Transmit FIFO Level
  • Transmit FIFO Read
  • Transmit Holding Register
  • UART Component Version
  • UART Status Register

Structs§

Type Aliases§

  • CPR (r) register accessor: Component Parameter Register
  • CTR (r) register accessor: Component Type Register
  • DLH (rw) register accessor: Divisor Latch (High)
  • DLL (rw) register accessor: Divisor Latch (Low)
  • DMASA (w) register accessor: DMA Software Acknowledge
  • FAR (rw) register accessor: FIFO Access Register
  • FCR (w) register accessor: FIFO Control Register
  • HTX (rw) register accessor: Halt TX
  • IER (rw) register accessor: Interrupt Enable Register
  • IIR (r) register accessor: Interrupt Identification Register
  • LCR (rw) register accessor: Line Control Register
  • LSR (r) register accessor: Line Status Register
  • MCR (rw) register accessor: Modem Control Register
  • MSR (r) register accessor: Modem Status Register
  • RBR (rw) register accessor: Receive Buffer Register
  • RFL (r) register accessor: Receive FIFO Level
  • RFW (w) register accessor: Receive FIFO Write
  • SBCR (rw) register accessor: Shadow Break Control Register
  • SCR (rw) register accessor: Scratchpad Register
  • SDMAM (rw) register accessor: Shadow DMA Mode
  • SFE (rw) register accessor: Shadow FIFO Enable
  • SRBR (r) register accessor: Shadow Receive Buffer Register
  • SRR (w) register accessor: Software Reset Register
  • SRT (rw) register accessor: Shadow RCVR Trigger
  • SRTS (rw) register accessor: Shadow Request to Send
  • STET (rw) register accessor: Shadow TX Empty Trigger
  • STHR (r) register accessor: Shadow Transmit Holding Register
  • TFL (rw) register accessor: Transmit FIFO Level
  • TFR (r) register accessor: Transmit FIFO Read
  • THR (rw) register accessor: Transmit Holding Register
  • UCV (r) register accessor: UART Component Version
  • USR (r) register accessor: UART Status Register