Module rk3399_pac::pref_cache
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VPU Prefetch Cache Registers
Modules§
- clear page register
- Command setting register
- enables cacheable accesses and cache read allocation
- maximum read register
- performance counter 0 source register
- performance counter 0 source register
- performance counter 0 value register
- performance counter 1 value register
- L2 cache SIZE
- Status register
- VERSION register
Structs§
- Register block
Type Aliases§
- CLEAR_PAGE (w) register accessor: clear page register
- COMMAND (rw) register accessor: Command setting register
- ENABLE (rw) register accessor: enables cacheable accesses and cache read allocation
- MAX_READS (rw) register accessor: maximum read register
- PERFCNT_SRC0 (rw) register accessor: performance counter 0 source register
- PERFCNT_SRC1 (rw) register accessor: performance counter 0 source register
- PERFCNT_VAL0 (rw) register accessor: performance counter 0 value register
- PERFCNT_VAL1 (rw) register accessor: performance counter 1 value register
- SIZE (r) register accessor: L2 cache SIZE
- STATUS (rw) register accessor: Status register
- VERSION (r) register accessor: VERSION register