Module rk3399_pac::pmugrf
source · Expand description
Power Management Unit General Register File (PMUGRF) Registers
Modules§
- GPIO0A drive strength control
- GPIO0A iomux control
- GPIO0A PU/PD control
- GPIO0A smit control
- GPIO0D drive strength control
- GPIO0B iomux control
- GPIO0B PU/PD control
- GPIO0B smit control
- GPIO0 A/B HE control
- GPIO0 A/B SR control
- GPIO1A drive strength control
- GPIO1A iomux control
- GPIO1A PU/PD control
- GPIO1A smit control
- GPIO1D drive strength control
- GPIO1B iomux control
- GPIO1B PU/PD control
- GPIO1B smit control
- GPIO1C drive strength control
- GPIO1C iomux control
- GPIO1C PU/PD control
- GPIO1C smit control
- GPIO1D drive strength control
- GPIO1D iomux control
- GPIO0D PU/PD control
- GPIO1D smit control
- GPIO1C/D HE control
- GPIO1C/D SR control
- GPIO1 A/B HE control
- GPIO1 A/B SR control
- os register
- os register
- os register
- os register
- OSC control register
- pmu pvtm configuration register0
- pmu pvtm configuration register1
- pmu pvtm status register
- pmu pvtm status register
- SoC control register 0
- SoC control register 10
- SoC control register 11
Structs§
- Register block
Type Aliases§
- GPIO0A_E (rw) register accessor: GPIO0A drive strength control
- GPIO0A_IOMUX (rw) register accessor: GPIO0A iomux control
- GPIO0A_P (rw) register accessor: GPIO0A PU/PD control
- GPIO0A_SMT (rw) register accessor: GPIO0A smit control
- GPIO0B_E (rw) register accessor: GPIO0D drive strength control
- GPIO0B_IOMUX (rw) register accessor: GPIO0B iomux control
- GPIO0B_P (rw) register accessor: GPIO0B PU/PD control
- GPIO0B_SMT (rw) register accessor: GPIO0B smit control
- GPIO0L_HE (rw) register accessor: GPIO0 A/B HE control
- GPIO0L_SR (rw) register accessor: GPIO0 A/B SR control
- GPIO1A_E (rw) register accessor: GPIO1A drive strength control
- GPIO1A_IOMUX (rw) register accessor: GPIO1A iomux control
- GPIO1A_P (rw) register accessor: GPIO1A PU/PD control
- GPIO1A_SMT (rw) register accessor: GPIO1A smit control
- GPIO1B_E (rw) register accessor: GPIO1D drive strength control
- GPIO1B_IOMUX (rw) register accessor: GPIO1B iomux control
- GPIO1B_P (rw) register accessor: GPIO1B PU/PD control
- GPIO1B_SMT (rw) register accessor: GPIO1B smit control
- GPIO1C_E (rw) register accessor: GPIO1C drive strength control
- GPIO1C_IOMUX (rw) register accessor: GPIO1C iomux control
- GPIO1C_P (rw) register accessor: GPIO1C PU/PD control
- GPIO1C_SMT (rw) register accessor: GPIO1C smit control
- GPIO1D_E (rw) register accessor: GPIO1D drive strength control
- GPIO1D_IOMUX (rw) register accessor: GPIO1D iomux control
- GPIO1D_P (rw) register accessor: GPIO0D PU/PD control
- GPIO1D_SMT (rw) register accessor: GPIO1D smit control
- GPIO1H_HE (rw) register accessor: GPIO1C/D HE control
- GPIO1H_SR (rw) register accessor: GPIO1C/D SR control
- GPIO1L_HE (rw) register accessor: GPIO1 A/B HE control
- GPIO1L_SR (rw) register accessor: GPIO1 A/B SR control
- OS_REG0 (rw) register accessor: os register
- OS_REG1 (rw) register accessor: os register
- OS_REG2 (rw) register accessor: os register
- OS_REG3 (rw) register accessor: os register
- OSC_E (rw) register accessor: OSC control register
- PMUPVTM_CON0 (rw) register accessor: pmu pvtm configuration register0
- PMUPVTM_CON1 (rw) register accessor: pmu pvtm configuration register1
- PMUPVTM_STATUS0 (rw) register accessor: pmu pvtm status register
- PMUPVTM_STATUS1 (rw) register accessor: pmu pvtm status register
- SOC_CON0 (rw) register accessor: SoC control register 0
- SOC_CON10 (rw) register accessor: SoC control register 10
- SOC_CON11 (rw) register accessor: SoC control register 11