Module rk3399_pac::pmucru

Power Management Unit Clock and Reset Unit (PMUCRU) Registers

Modules

• clkfrac_con0
  Internal clock select and divide register6
• clkfrac_con1
  Internal clock select and divide register7
• clkgate_con0
  Internal clock gating register0
• clkgate_con1
  Internal clock gating register1
• clkgate_con2
  Internal clock gating register2
• clksel_con0
  Internal clock select and divide register0
• clksel_con1
  Internal clock select and divide register1
• clksel_con2
  Internal clock select and divide register2
• clksel_con3
  Internal clock select and divide register3
• clksel_con4
  Internal clock select and divide register4
• clksel_con5
  Internal clock select and divide register5
• gatedis_con0
  Internal gate disable control register0
• ppll_con0
  PPLL configuration register0
• ppll_con1
  PPLL configuration register1
• ppll_con2
  PPLL configuration register2
• ppll_con3
  PPLL configuration register3
• ppll_con4
  PPLL configuration register4
• ppll_con5
  PPLL configuration register5
• rstnhold_con0
  Internal reset hold control register0
• rstnhold_con1
  Internal reset hold control register1
• softrst_con0
  Internal software reset control register0
• softrst_con1
  Internal software reset control register1

Structs

• RegisterBlock
  Register block

Type Aliases

• ClkfracCon0
  CLKFRAC_CON0 (rw) register accessor: Internal clock select and divide register6
• ClkfracCon1
  CLKFRAC_CON1 (rw) register accessor: Internal clock select and divide register7
• ClkgateCon0
  CLKGATE_CON0 (rw) register accessor: Internal clock gating register0
• ClkgateCon1
  CLKGATE_CON1 (rw) register accessor: Internal clock gating register1
• ClkgateCon2
  CLKGATE_CON2 (rw) register accessor: Internal clock gating register2
• ClkselCon0
  CLKSEL_CON0 (rw) register accessor: Internal clock select and divide register0
• ClkselCon1
  CLKSEL_CON1 (rw) register accessor: Internal clock select and divide register1
• ClkselCon2
  CLKSEL_CON2 (rw) register accessor: Internal clock select and divide register2
• ClkselCon3
  CLKSEL_CON3 (rw) register accessor: Internal clock select and divide register3
• ClkselCon4
  CLKSEL_CON4 (rw) register accessor: Internal clock select and divide register4
• ClkselCon5
  CLKSEL_CON5 (rw) register accessor: Internal clock select and divide register5
• GatedisCon0
  GATEDIS_CON0 (rw) register accessor: Internal gate disable control register0
• PpllCon0
  PPLL_CON0 (rw) register accessor: PPLL configuration register0
• PpllCon1
  PPLL_CON1 (rw) register accessor: PPLL configuration register1
• PpllCon2
  PPLL_CON2 (rw) register accessor: PPLL configuration register2
• PpllCon3
  PPLL_CON3 (rw) register accessor: PPLL configuration register3
• PpllCon4
  PPLL_CON4 (rw) register accessor: PPLL configuration register4
• PpllCon5
  PPLL_CON5 (rw) register accessor: PPLL configuration register5
• RstnholdCon0
  RSTNHOLD_CON0 (rw) register accessor: Internal reset hold control register0
• RstnholdCon1
  RSTNHOLD_CON1 (rw) register accessor: Internal reset hold control register1
• SoftrstCon0
  SOFTRST_CON0 (rw) register accessor: Internal software reset control register0
• SoftrstCon1
  SOFTRST_CON1 (rw) register accessor: Internal software reset control register1