Module rk3399_pac::emmccore

source ·
Expand description

eMMC Controller (EMMCCORE) Registers

Modules§

  • Auto CMD error status register
  • ADMA system address register
  • ADMA error status register
  • Argument register
  • Block count register
  • Block gap control register
  • Block size register
  • Boot timeout control register
  • Buffer data port register
  • Capabilities register
  • Clock control Register
  • Command register
  • Command queueing capabilities register
  • Command queueing configuration register
  • Command queueing command response argument register
  • Command queueing command response for direct-command task register
  • Command queueing command response index register
  • Command queueing control register
  • Command queueing device pending tasks register
  • Command queueing device queue status register
  • Command queueing interrupt coalescing register
  • Command queueing interrupt signal enable register
  • Command queueing interrupt status register
  • Command queueing interrupt status enable register
  • Command queueing response mode error mask register
  • Command queueing send status configuration register 1
  • Command queueing send status configuration register 2
  • Command queueing task clear register
  • Command queueing task doorbell register
  • Command queueing task doorbell notification register
  • Command queueing task descriptor list base address register
  • Command queueing task descriptor list base address upper 32bits register
  • Command queueing task error information register
  • Command queueing version register
  • Error interrupt signal enable register
  • Error interrupt status register
  • Error interrupt status enable register
  • Force event register for Auto CMD error status
  • Force event register for error interrupt status
  • Host control 1 register
  • Host Control 2 Register
  • Normal interrupt signal enable register
  • Normal interrupt status register
  • Normal interrupt status enable register
  • Present state register
  • Preset value register for DDR50
  • Preset value register for Default Speed
  • Preset value register for High Speed
  • Preset value register for HS400
  • Preset value register for Initialization
  • Preset value register for SDR12
  • Preset value register for SDR25
  • Preset value register for SDR50
  • Preset value register for SDR104
  • Power control register
  • Response register bit [31:0]
  • Response register bit [63:32]
  • Response register bit [95:64]
  • Response register bit [127:98]
  • System address/ Argument 2 register
  • Slot interrupt status register
  • Software reset register
  • Timeout control register
  • Transfer mode register
  • Vendor register
  • Host controller version register

Structs§

Type Aliases§

  • ACMDERRSTS (r) register accessor: Auto CMD error status register
  • ADMAADDR (rw) register accessor: ADMA system address register
  • ADMAERRSTS (r) register accessor: ADMA error status register
  • ARG (rw) register accessor: Argument register
  • BLKCNT (rw) register accessor: Block count register
  • BLKGAPCTRL (rw) register accessor: Block gap control register
  • BLKSIZ (rw) register accessor: Block size register
  • BOOTTIMEOUT (rw) register accessor: Boot timeout control register
  • BUFFER (rw) register accessor: Buffer data port register
  • CAP (rw) register accessor: Capabilities register
  • CLKCTRL (rw) register accessor: Clock control Register
  • CMD (rw) register accessor: Command register
  • CQCAP (r) register accessor: Command queueing capabilities register
  • CQCFG (rw) register accessor: Command queueing configuration register
  • CQCRA (r) register accessor: Command queueing command response argument register
  • CQCRDT (r) register accessor: Command queueing command response for direct-command task register
  • CQCRI (r) register accessor: Command queueing command response index register
  • CQCTRL (rw) register accessor: Command queueing control register
  • CQDPT (r) register accessor: Command queueing device pending tasks register
  • CQDQSTS (r) register accessor: Command queueing device queue status register
  • CQINTCOAL (rw) register accessor: Command queueing interrupt coalescing register
  • CQINTSIGENA (rw) register accessor: Command queueing interrupt signal enable register
  • CQINTSTS (rw) register accessor: Command queueing interrupt status register
  • CQINTSTSENA (rw) register accessor: Command queueing interrupt status enable register
  • CQRMEM (r) register accessor: Command queueing response mode error mask register
  • CQSSC1 (rw) register accessor: Command queueing send status configuration register 1
  • CQSSC2 (rw) register accessor: Command queueing send status configuration register 2
  • CQTCLR (rw) register accessor: Command queueing task clear register
  • CQTDB (rw) register accessor: Command queueing task doorbell register
  • CQTDBN (rw) register accessor: Command queueing task doorbell notification register
  • CQTDLBA (rw) register accessor: Command queueing task descriptor list base address register
  • CQTDLBAU (rw) register accessor: Command queueing task descriptor list base address upper 32bits register
  • CQTEI (r) register accessor: Command queueing task error information register
  • CQVER (r) register accessor: Command queueing version register
  • ERRINTSIGENA (rw) register accessor: Error interrupt signal enable register
  • ERRINTSTS (rw) register accessor: Error interrupt status register
  • ERRINTSTSENA (rw) register accessor: Error interrupt status enable register
  • FEACMD (w) register accessor: Force event register for Auto CMD error status
  • FEERRINT (rw) register accessor: Force event register for error interrupt status
  • HOSTCTRL1 (rw) register accessor: Host control 1 register
  • HOSTCTRL2 (rw) register accessor: Host Control 2 Register
  • NORINTSIGENA (rw) register accessor: Normal interrupt signal enable register
  • NORINTSTS (rw) register accessor: Normal interrupt status register
  • NORINTSTSENA (rw) register accessor: Normal interrupt status enable register
  • PRESTS (rw) register accessor: Present state register
  • PVALDDR50 (r) register accessor: Preset value register for DDR50
  • PVALDS (r) register accessor: Preset value register for Default Speed
  • PVALHS (r) register accessor: Preset value register for High Speed
  • PVALHS400 (r) register accessor: Preset value register for HS400
  • PVALINIT (r) register accessor: Preset value register for Initialization
  • PVALSDR12 (r) register accessor: Preset value register for SDR12
  • PVALSDR25 (r) register accessor: Preset value register for SDR25
  • PVALSDR50 (r) register accessor: Preset value register for SDR50
  • PVALSDR104 (r) register accessor: Preset value register for SDR104
  • PWRCTRL (rw) register accessor: Power control register
  • RESP0 (rw) register accessor: Response register bit [31:0]
  • RESP1 (rw) register accessor: Response register bit [63:32]
  • RESP2 (rw) register accessor: Response register bit [95:64]
  • RESP3 (rw) register accessor: Response register bit [127:98]
  • SADDR (rw) register accessor: System address/ Argument 2 register
  • SLOTINTSTS (r) register accessor: Slot interrupt status register
  • SWRST (rw) register accessor: Software reset register
  • TIMEOUT (rw) register accessor: Timeout control register
  • TRANSMOD (rw) register accessor: Transfer mode register
  • VENDOR (rw) register accessor: Vendor register
  • VERSION (r) register accessor: Host controller version register