Module rk3399_pac::dmac

DMA Controller (DMAC) Registers

Modules

• ccr
  Channel Control Registers
• cpc
  Channel Program Counter Registers
• cr0
  Configuration Register 0
• cr1
  Configuration Register 1
• cr2
  Configuration Register 2
• cr3
  Configuration Register 3
• cr4
  Configuration Register 4
• crdn
  DMA Configuration Register
• csr
  Channel Status Registers
• dar
  DestinationAddress Registers
• dbgcmd
  Debug Command Register
• dbginst0
  Debug Instruction-0 Register
• dbginst1
  Debug Instruction-1 Register
• dbgstatus
  Debug Status Register
• dpc
  DMA Program Counter Register
• dsr
  DMA Manager Status Register
• event_ris
  Event-Interrupt Raw Status Register
• fsrc
  Fault Status DMA Channel Register
• fsrd
  Fault Status DMA Manager Register
• ftr
  Fault Type DMA Channel Register
• ftrd
  Fault Type DMA Manager Register
• intclr
  Interrupt Clear Register
• inten
  Interrupt Enable Register
• intmis
  Interrupt Status Register
• lc0
  Loop Counter 0 Registers
• lc1
  Loop Counter 1 Registers
• sar
  Source Address Registers
• wd
  DMA Watchdog Register

Structs

• RegisterBlock
  Register block

Type Aliases

• Ccr
  CCR (r) register accessor: Channel Control Registers
• Cpc
  CPC (r) register accessor: Channel Program Counter Registers
• Cr0
  CR0 (r) register accessor: Configuration Register 0
• Cr1
  CR1 (r) register accessor: Configuration Register 1
• Cr2
  CR2 (r) register accessor: Configuration Register 2
• Cr3
  CR3 (r) register accessor: Configuration Register 3
• Cr4
  CR4 (r) register accessor: Configuration Register 4
• Crdn
  CRDn (r) register accessor: DMA Configuration Register
• Csr
  CSR (r) register accessor: Channel Status Registers
• Dar
  DAR (r) register accessor: DestinationAddress Registers
• Dbgcmd
  DBGCMD (w) register accessor: Debug Command Register
• Dbginst0
  DBGINST0 (w) register accessor: Debug Instruction-0 Register
• Dbginst1
  DBGINST1 (w) register accessor: Debug Instruction-1 Register
• Dbgstatus
  DBGSTATUS (r) register accessor: Debug Status Register
• Dpc
  DPC (r) register accessor: DMA Program Counter Register
• Dsr
  DSR (r) register accessor: DMA Manager Status Register
• EventRis
  EVENT_RIS (r) register accessor: Event-Interrupt Raw Status Register
• Fsrc
  FSRC (r) register accessor: Fault Status DMA Channel Register
• Fsrd
  FSRD (r) register accessor: Fault Status DMA Manager Register
• Ftr
  FTR (r) register accessor: Fault Type DMA Channel Register
• Ftrd
  FTRD (rw) register accessor: Fault Type DMA Manager Register
• Intclr
  INTCLR (w) register accessor: Interrupt Clear Register
• Inten
  INTEN (rw) register accessor: Interrupt Enable Register
• Intmis
  INTMIS (r) register accessor: Interrupt Status Register
• Lc0
  LC0 (r) register accessor: Loop Counter 0 Registers
• Lc1
  LC1 (r) register accessor: Loop Counter 1 Registers
• Sar
  SAR (r) register accessor: Source Address Registers
• Wd
  WD (rw) register accessor: DMA Watchdog Register